Intel 9EJL4 manual 3-3Advanced Chipset Features, 4Advance Chipset Features, DRAM Timing Selectable

Chapter 3

3-3 Advanced Chipset Features

By choosing the [Advanced Chipset Features] option from the CMOS Setup Utility menu (Figure 3-1), the screen below displays the manufacturer's default values for the motherboard.

Figure 3-4 Advance Chipset Features

All of the above settings have been determined by the motherboard manufacturer and should not be changed unless you are absolutely sure of what you are doing. Explanation of the DRAM timing and chipset features setup is lengthy, highly technical and beyond the scope of this manual. Below are some abbreviated descriptions of the functions in this setup menu.

DRAM Timing Selectable:

The function allows you to enable or disable the DRAM timing control by SPD. It is recommended to keep the default setting for a stable system operation.

CAS Latency Time:

This item controls the latency between DRAM read command and the time the data actually becomes available.

Active to Precharge Delay:

This item controls the number of DRAM clocks used for DRAM parameters.

DRAM RAS# to CAS# Delay:

This item controls the latency between DRAM active command and read/write command.

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