28 • Operation Theorem
3. I_REQ & I_ACK Handshaking
valid data
D10~DI31
valid data
t1 t2
t5
t4t3
IN I_REQ
IN I_ACK
t1 ≥ 0ns t5 ≥ 60ns t3 ≥ 2 PCI CLK Cycle
t2 ≥ 0ns t4 ≥ 1 PCI CLK Cycle
Note: I_REQ must be asserted until I_ACK asserts, I_ACK will be asserted
until I_REQ de-asserts.
4. O_REQ as output data strobe
Out O_REQ
tcyc
th
ts
D00~D031
valid datavalid data
ts ≥ 19ns th ≥ 2 PCI CLK Cycles
Tcyc ≥ 500ns