Sheet 15 | Intel M570TU specification

Schematic Diagrams

B.Schematic Diagrams

Sheet 15 of 42

ICH9-M 3/4 CASE FAN

U 8 C

3 . 3 V S

3 . 3V

I C H _ S MB CL K 0

S A T A 0 G P

1 0, 11 , 1 8 I C H _ S M B C L K 0

G 1 6

S M B CL K

S A T A 0 GP /G P IO 2 1

A H2 3

1 0, 11 , 1 8 I C H _ S M B D A T 0

I C H _ S MB DA T 0

A 1 3

SMB

A F 1 9

S A T A 1 G P

S A T A 0 G P

R2 2 2

1 0K _0 4

R 5 3 9

2 . 2 K _ 04

I C H _ S M B C LK 0

L I N K _ A L E R T

E 1 7

S M B DA T A

SATA

GPIO

S A T A 1 GP /G P IO 1 9

A E 2 1

S A T A 1 G P

R5 6 9

1 0K _0 4

2007/12/15

21 , 3 6

I C H _ S M B D A T 1

S M LI N K 1

S A T A 4 GP /G P IO 3 6

C LK

_I C H 1 4

C LK _I C H 14

1 8

R 4 8 3

1 0K

_0 4

I C H _ S M B D A T1

I C H _ S MB

CL K 1

C 1 7

M XM _ P RS N T # R5 6 7

*1 0 K _ 0 4

R 5 0 9

2 . 2 K _ 04

I C H _ S M B D A T0

EVT

L INK A LE RT # / GP I O6 0 /CL G P IO4

A D2 0

M X M_ P R S N T #

3 7

R4 8 4

1 0K _0 4

I C H _ S M B C LK 1

21 , 3 6

I C H _ S M B C L K 1

I C H _ S MB

DA T 1

B 1 8

S M LI N K 0

S A T A 5 GP /G P IO 3 7

M X M_ P W R OK

2 2, 3 7

M XM _ P W R OK R5 7 1

1 0K _0 4

R 5 0 8

1 0K _0 4 L I N K _ A L E R T

1 4

K B C _ LP C P D #

P M_ R I #

F 1 9

S U S _ S TA T# / L P C P D#

Clocks

C L K 1 4

A F 3

C LK _I C H 4 8

C LK _I C H 48 1 8

S A T A 0 G P

R2 1 2

*1 0 K _ 0 4

R N 2 2

S W I #

P M_ S Y S R S T #

G 1 9

S U S CL K

M XM _ P W R OK R5 6 8

*1 0 K _ 0 4

RI #

C L K 4 8

S A T A 1 G P

R5 6 2

*1 0 K _ 0 4

R 5 5 0

*0 _ 0 4 S B _ S U S S T A T #

R 4

P 1

S U S C L K

M XM _ P RS N T # R5 6 0

*1 0 K _ 0 4

I CH _ S U S B #

P M_ B M B U S Y #

M 6

S Y S _ RE S E T#

S L P _ S 4 #

E 1 6

I C H _ S U S C #

Layout note:

P M _ D P R S L P V R R 1 55

1 00 K _ 0 4

P M S Y N C# /G P IO0

8 P 4 R X 1 0 K _ 04 3

S L P _ S 3 #

C1 6

I C H _ S U S B #

It"s for internal testing

R 5 02

1 0 K _ 0 4

P C I E _ W A K E #

S W I #

A 1 7

S L P _ S 5 #

G1 7

S L P _ S 5 #

R S MR S T #

R4 7 7

1 0K _0 4

R 5 07

1 0 K _ 0 4

P M _R I #

S W I #

P M_ S T P P

CI #

S M B A L E RT # /G P IO1 1

GPIOSYS

S 4 _ S T A TE #/G P IO 2 6

C1 0

S 4 _ S T A T E

purposes only

C6 6 3

* 10 0 p _ 50 V _ 0 4

R 4 80

1 0 K _ 0 4

P M _S Y S R S T #

P M_ S T P P C I #

A 1 4

S T P _ P CI #

P M_ S T P C P U #

MGTPower

S B _ P W R O K

L A N _R S T #

18 P M _ S T P C P U #

E 1 9

P W R OK

G2 0

R5 0 6

1 0K _0 4

S T P _ CP U #

3 . 3V S

P M_ C L K R U N #

P M_ C L K R U N#

L 4

CL K R UN #

D P R S L P V R/G P IO 1 6

Z 15 1 5 R 1 56

*0 _ 0 4

P M_ D P R S LP V R

5 , 3 5

W O L _E N

R4 8 1

1 0 0K _0 4

R 57 2

1 0 0 K _ 04

S B _ A L I E N _D E T #

1 9 , 2 1, 3 6 P C I E _ W A K E #

P C I E _ W A K E #

E 2 0

W A K E #

B A T L OW #

B 1 3

S B _ B A TL O W #

OD D _ D E T E C T #

I N T _ S E R I RQ

R 22 6

1 0 0 K _ 04

I NT _ S E R I R Q

M 5

R 54 7

1 0 K _ 0 4

I NT _ S E R I R Q

P M_ T H R M #

A J 2 3

S E R IRQ

P W R _ B T N #

P W R _B TN # 2 2

P M _T H R M #

2 , 3 , 2 2 P M_ T H R M #

T HR M#

P W RB T N #

R 22 7

8 . 2 K _ 0 4

R 53 8

8 . 2 K _ 0 4

P M _C L K R U N #

28 V R M _P W R G D

D 2 1

V R MP W R G D

L A N _ R S T #

D2 0

L A N _R S T #

Z 1 5 01

A 2 0

T P 1 1

RS MR S T #

D2 2

Z 15 1 6 R 5 01

*0 _ 0 4

R S M R S T# 2 2

R 54 5

* 1 0K _ 0 4

I CH _ S P K R

Z 1 5 03

A G 1 9

GP IO1

CK _P W RG D

C L K _ P W R GD

1 8

R 22 8

* 1 0K _ 0 4

MC H _ I C H _ S Y N C #

R 2 2 0

*0 _ 0 4 Z 1 5 30

A H 2 1

1 7

OD D _ D E T E C T #

GP IO6

M P W R OK

R 5 6 1

*0 _ 0 4

Z 1 5 04

A G 2 1

MP W RO K 5

2 8

S B _ B L O N

S C I #

A 2 1

GP IO7

C L P W R OK

R 22 1

1 0 K _ 0 4

I CH _ GP I O3 9

14 , 2 2

S CI #

S MI #

C 1 2

IO8

B 1 6

Z 15 1 7

R 4 85

*0 _ 0 4

S L P _ M#

2 2 , 32 , 3 3

I CH _ GP I O5 7

14 , 2 2

S MI #

Z 1 5 05

IO1 2

S L P _ M #

3. 3 V M

3 . 3 V S

R 49 1

1 0 0 K _ 04

C 2 1

R 50 3

1 0 0 K _ 04

V R M_ P W R GD

S B _ A L I E N _D E T #

A E 1 8

GP IO1 3

F 2 4

R 47 9

* 1 K _0 4

I CH _ T P 3

K 1

GP IO1 7

CL _ C LK 0

B 1 9

C L _ C L K 0

R 49 4

R 4 7 3

30 , 3 7

M XM _ P W R _O N

A F 8

GP IO1 8

ControllerLink

CL _ C LK 1

C L _ C L K 1

3 6

3 . 2 4 K _ 1% _ 0 4

3 . 2 4K _ 1 % _ 0 4

V GA _ R S T #

R 2 11

* 10 K _ 0 4

Z 1 50 2

A J 2 2

GP IO2 0

MISCGPIO

F 2 2

C L _ D A TA 0 5

7 1 4

7 4L V C 0 8P W

23 , 3 7 E X _ H D MI _ H P D

Z 1 53 2

I C H9 M RE V

1. 0

CL _ DA TA 0

R 5 19

* 10 K _ 0 4

A 9

C1 9

2007/12/15

28 , 3 7

E X _ D V I _ H P D

D 1 9

GP IO2 7

CL _ DA TA 1

C L _ D A TA 1

3 6

S R S _ E N

Z 1 5 08

L 1

GP IO2 8

C L _ V RE F 0

C2 5

C L_ V R E F 0

3 . 3 V

Z 1 5 09

A E 1 9

S A T A C LK RE Q # /GP I O 3 5

A 1 9

C L_ V R E F 1

C L_ V R E F 0

C L _ V R E F 1

I C H _ GP I O 3 9

A G 2 2

S L OA D/G P IO3 8

C L _ V RE F 1

Z 1 5 10

A F 2 1

S D A T A OU T 0/G P IO 39

C L_ R S T 0 #

F 2 1

C L_ R S T #0

C L _ R S T# 0

U 10 C

Z 1 5 11

A H 2 4

S D A T A OU T 1/G P IO 48

D1 8

R 49 5

C6 6 8

R 4 7 4

C 6 6 4

7 4 L V C0 8 P W

3/12_Cost down

I C H _ GP I O 5 7

A 8

GP IO4 9

C L_ R S T 1 #

R S MR S T #

3 . 3V

I C H _ S P K R

GP IO5 7 / CL G P IO5

ME M_ L E D/G P I O 2 4

A 1 6

S US C # _ R

I C H _S P K R

M 7

C1 8

S US _P W R _ A C K 2 2

45 3 _ 1 %_ 0 6

0 . 1 u _1 0 V _ 0 4

4 5 3 _1 % _ 0 6

0 . 1 u_ 1 0 V _ 04

I C H _ S U S C #

1 0

MC H _ I C H _ S Y N C #

A J 2 4

S P K R

G P IO 10 / S U S _ P W R _ A CK

C1 1

Z 15 1 8

R 4 8 8

*0 _ 0 4

5 MC H _I C H _ S Y N C #

I C H _ T P 3

B 2 1

MC H _ S Y NC #

G P IO 1 4/ A C_ P R E S E N T

C2 0

W O L _E N

A C_ P R E S E N T 2 9

C 3 1 1

Z 1 5 12

A H 2 0

T P 3

W O L _ E N/G P IO 9

Z 1 5 13

A J 2 0

T P 8

*0 . 1 u _ 16 V _ 0 4

Z 1 5 14

A J 2 1

T P 9

EVT

U1 0 B

T P 1 0

3 . 3 V

R S M R S T#

For ME function

S B _B A T LO W #

3 . 3 V M

I C H _ S U S B #

S U S B #

2 1 , 2 2 , 3 4, 38

R 48 7

8 . 2 K _ 0 4

P W R _ B T N #

R 17 0

* 1 0K _ 0 4

C 3 32 4 . 7 u _6 . 3 V _ 0 6

R2 3 7

3 . 3 V M

S 4 _ S T A T E

R 4 8 9

*0 _ 0 4

S U S C #

2 2, 3 1

R2 3 9

1 0 0K

_0 4

3 . 3 V

S U S C # _ R

R 4 9 0

0 _ 04

S U S _ P W R _ A CK

R 48 2

1 0 K _ 0 4

R2 3 4

1 00 K _ 0 4

R 5 0 5

*1 0 K _ 04 P M _S TP C P U #

R 4 8 6

*1 0 K _ 04 P M _S TP P C I #

1 5 0 K _ 04

Z 1 5 19

D2 0

S C S 35 5 V

3 . 3 V

R 22 9

1 0 0 K _0 4

U 1 0 D

CASE FAN

5 V S

3 2

V C C P _ P W R GD

7 4 L V C 08 P W

40MIL

R 5 91

3 1

1 . 5 V _ P W RG D

1 1

M P W R O K

L *H CB 2 0 1 2K F -5 00 T 4 0

1 0 0K _0 4

3 . 3 V

V GA _ S E L # 1 2 , 2 8

Q 5 5

U 1 0 A

J _ CA S E F A N 1

12 , 1 4 , 2 8 V GA _S E L

* 2N 7 00 2 W

7 4 L V C 0 8 P W

Z 1 52 4

C 5 2 6

P M _ P W R OK

Z 1 52 5

D 4 2

S B _ P W R OK

* 1 0U _ 10 V _ 0 8

S B _ P W R OK 3 7

* S C S 35 5 V

5 , 35 D E L A Y _ P W R G D

C3 5 2

R 23 8

* 8 52 0 5 -0 30 0

1 0 K _ 04

*0 . 1 u _ 50 V _ 0 4

2 2 C A S E _ F A N S E N

3 . 3 V S

R3 8 4

*4 . 7 K _ 0 4

POWER OK

3 . 3V

R 3 86

C L K _ I C H 1 4 R 1 3 9

*1 0 K _ 04

Z 1 5 2 7

C 20 3

* 0 . 1 u_ X 7 R _ 0 4

D 43

C L K _ I C H 4 8

R 5 6 3

*1 0 K _ 04

Z 1 5 2 8

C 75 7

* 0 . 1 u_ X 7 R _ 0 4

* S C S 3 5 5 V

Z 1 52 6

Q 42

M P W R OK

C A S E _ F A N

E*2 N 3 90 4

P M_ P W R O K

* 1 K _0 4

P M_ P W RO K 2 2 , 28

R3 8 5

2 3 S Y S _ P W R GD

U 30

R2 0 8

7 4 A HC 1 G0 8 GW

*1 0 0 K _0 4

*1 0 K _ 0 4

1 2 , 1 3 , 1 6, 1 7 , 2 3 , 2 4, 25 , 2 6 , 2 8, 33 , 3 7 , 3 8			5V	S
2 , 1 4, 1 6 , 1 9 , 2 1, 2 8 , 2 9 , 3 0,	31 , 3 2 , 3 4,	36 , 3 7 , 3 8	3. 3 V
2 , 3 , 5 , 9 , 1 2, 1 3 , 1 4 , 1 6, 1 9 , 2 0 , 2 1, 2 2 , 2 3 , 2 4,	25 , 2 8 , 3 0,	33 , 3 5 , 3 7	3. 3 V S

B - 16 ICH9-M 3/4 CASE FAN

Intel M570TU manual Sheet 15

Models: M570TU

Sheet 15 of 42

ICH9-M 3/4 CASE FAN

SMB

2007/12/15

EVT

M X M_ P W R OK

Layout note:

It"s for internal testing

purposes only

P M_ D P R S LP V R

M P W R OK

MP W RO K 5

V R M_ P W R GD

2007/12/15

3/12_Cost down

S P K R

EVT

For ME function

CASE FAN

40MIL

POWER OK

M P W R OK

2 3 S Y S _ P W R GD

R2 0 8

7 4 A HC 1 G0 8 GW

*1 0 0 K _0 4