F u l l-S i z e C P U C a r d

S B C - 7 8 0

 

 

Programming

An onboard watchdog timer reduces the chance of disruptions which CPLD (Compact Programmable Logical Device) interface can cause. This

is an invaluable

protective device for standalone or punma

nned

applications. When the watchdog timer activates (CPU processing has

 

come to a halt), it can reset the system, or generate an interrupt on IRQ10, IRQ11, IRQ15, and NM1. This can be set via I/O Port 444, the function as following:

0:RESET

1:NM1

2:IRQ10

3:IRQ11

4:IRQ15

If you decide to program the watchdog timer, you must write data to I/O port 443 (hex). The output data is a value timer. You can write form 01 (hex) to FF (hex) while simultaneously setting it. When you want to disable the watchdog timer, your program should read a Hex value from I/O port 80 (hex).

The following procesude is a sample program for the watchdog timer:

Type C:\DOS\Debug <ENTER>

To start watchdog timer and set function “Reset” type; o 444 0<Enter>; out 444h data 0

To input Watchdog timers time-out interval of 5 seconds type; o 443 05<Enter>; out 443h data 05

To disable the watch timer type;i80 <Enter>

The time interval data of the watchdog timer is shown in binary code (8 bits).

Sample 2: 5 seconds

0

0

0

0

0

1

0

1

Appendix A Programming the Watchdog Timer

A-2

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Image 77
Intel SBC-780 manual Programming, Reset