Intel specifications Intel X18-M/X25-MSATA SSD

Intel® X18-M/X25-M SATA SSD

Table 14.	Serial ATA Power Pin Definitions for 1.8” Form Factor (Continued)
Pin		Function	Definition	Mating Order1
P6		V5	5 V Power. Not connected4	2nd Mate
P7		DAS	Device Activity Signal5	2nd Mate
Key		Key	NC	NC
P8		Optional	Manufacturing Test Pin6	2nd Mate
P9		Optional	Manufacturing Test Pin6	2nd Mate

Notes:

1.All mate sequences assume zero angular offset between connectors.

2.P1 and P2 are internally connected to one another within the device.

3.Ground connectors P3 and P4 may contact before the other 1st mate pins in both the power and signal connectors to discharge ESD in a suitably configure backplane connector.

4.P5 and P6 are not connected internal to the device. The host may put 5V on these pins.

5.The host may ground P7 if it is not used for Device Activity Signal (DAS).

6.P8 and P9 should not be connected by the host.

Table 15.	Serial ATA Power Pin Definitions for 2.5” Form Factor
Pin1		Function	Definition	Mating Order
P1		Not connected2	(3.3 V Power)
P2		Not connected2	(3.3 V Power)
P3		Not connected2	(3.3 V Power. pre-charge)	2nd Mate
P4		Ground3, 4		1st Mate
P5		Ground3		1st Mate
P6		Ground3		1st Mate
P7		V53, 5	5 V Power	1st Mate
P8		V53, 5	5 V Power	2nd Mate
P9		V53, 5	5 V Power	2nd Mate
P10		Ground3		1st Mate
P11		DAS6	Device Activity Signal6	2nd Mate
P12		Ground3, 4		1st Mate
P13		V127	12 V Power. Not used.	2nd Mate
P14		V127	12 V Power. Not used.	2nd Mate
P15		V127	12 V Power. Not used.	2nd Mate

Notes:

1.All pins are in a single row, with a 1.27 mm (0.050”) pitch.

2.Pins P1, P2 and P3 are connected together, although they are not connected internally to the device. The host may put

3.3V on these pins.

3.The mating sequence are:

•the ground pins P4-P6, P10, P12 and the 5v power pin P7.

•the signal pins and the rest of the 5V power pins P8-P9.

4.Ground connectors P4 and P12 may contact before the other 1st mate pins in both the power and signal connectors to discharge ESD in a suitably configured backplane connector.

5.Power pins P7, P8,and P9 are internally connected to one another within the device.

6.The host may ground P11 if it is not used for Device Activity Signal (DAS).

7.Pins P13, P14 and P15 are connected together, although they are not connected internally to the device. The host may put 12 V on these pins.

Intel® X18-M/X25-M SATA Solid State Drive
Product Manual	February 2009
18	Order Number: 319765-006US