Marantz DR-6000, MAR770, MAR775 service manual Description, Measurements, Block Diagram

CDM V AM1250

Trig enta

HF amp.

Diode signals

Radial, focus

Motor, sledge

Loader assy

PROCESSOR DSA

CD10

SERVO

DECODER

IIS, DOBM

UDA1320	ANA OUT
DAC

CL96532086_048.eps 080999

Connect on pin 2 of position 1208 a clock signal of 8.4672 MHz ( 100ppm minimum rise time of 50ns and at TTL level (0V and +5V).

Keep microprocessor 7202 in reset by forcing pin 7 at position 1208 to +5V.

Release the reset. Now, the processor will reset the CD10 for at least 75 µs.

The output clock CL11 should be available now at pin 42 of the CD10.

Check the following frequencies :

Figure 8-19

8.3.1 Supply Voltages

Description

The CD main board receives +5V and +12V from the CDR main

board via respectively pin 16 and pin 15 of connector 1208. The

+5V is split up into +5VHF and +5V. The +5VHF is used mainly

Point

Position 7000 pin 16

Position 7202 pins 14,15

Position 7309 pin 6

Position 7309 pin 1

Position 7309 pin2

Frequency

8.4672 MHz ±100ppm

12MHz ±5%

11.2896 MHz ±100ppm

2.1168 MHz ±100ppm

44.1kHz ±100ppm

CL96532086_050.eps 080999

for the diode currents and the HF-amplifier. The +5V is used for

the digital part of the board. On the board a +3V3 is made from

the +5V for the decoder CD10 and an A3V3 for the DAC

UDA1320. The +12V is split up into A12V for the audio output

stage and +12V for the power drivers of the CDM.

Measurements

Connect following supplies to next pins :

+5V + 5% to pin 16 of connector 1208.

+12V + 5% to pin 15 of connector 1208. Ground reference to pin 17 of connector 1208.

Figure 8-21

8.3.3CD10 Decoder/Servo SAA7324 (7000)

Description

The CD10 is a single chip combining the functions of a CD decoder, digital servo and bitstream DAC. The decoder/servo part is based on the CD7. The decoding part supports a full audio specification and can operate at single speed (n=1) and double speed (n=2).

Block Diagram

Keep microprocessor 7202 in reset by forcing pin 7 of

VSSA2

VDDA2

VSSD2

D1

D2

D3

D4

VSSA1

VDDA1

VSSD1

VSSD3

VDDD1(P)

VDDD2(C)

connector 1208 to +5V. Check the following voltages :

8

9

10

11

4

14 5

17

33

50 58

52

57

R1

12

PRE-

CONTROL

ADC

R2

13

PROCESSING

FUNCTION

54

Point

Voltage

RA

OUTPUT

55

Position 1000 pins 1,3

+5V ± 5%

STAGES

FO

Vref

56

Position 7000 pins 5,17,21,57

+3.3V ± 5%

VRIN

7

SL

GENERATOR

CONTROL

Position 7005 pin 14

+5V ± 5%

40

PART

Position 7020 pins 25

+5V ± 5%

SCL

LDON

64

Position 7020 pins 26,27,28

+10 ±10%

SDA

39

MICROCONTROLLER

Position 7021 pin 5

+12V ±10

RAB

41

INTERFACE

59

MOTOR

42

MOTO1

Position 7022 pin 5

+12V ±10

SILD

CONTROL

60

MOTO2

Position 7025 pin 16

+5V ± 5%

HFIN

2

DIGITAL

ERROR

Position 7202 pin 38

+5V ± 5% ( other appl. 3V3 possible)

HFREF

1

PLL

CORRECTOR

FRONT

3

53

Position 7309 pins 4,13

+3V3 ± 5%

ISLICE

END

FLAGS

CFLG

Iref

6

Position 7120 pin 8

+12V ± 10

EFM

CL96532086_049.eps

TEST1

25

DEMODULATOR

AUDIO

PROCESSOR

EBU

51

080999

TEST2

31

TEST

INTERFACE

DOBM

TEST3

44

SRAM

30

Figure 8-20

24

EF

SELPLL

SERIAL

SCLK

29

CRIN

16

DATA

28

INTERFACE

WCLK

CROUT

15

TIMING

27

RAM

8.3.2

Clock Signals

CL16

26

DATA

ADDRESSER

CL11/4

49

37

SERIAL

SCLI

DATA

35

Description

48

(LOOPBACK)

WCLI

SBSY

36

The microprocessor has its own Xtal or resonator of 12MHz.

INTERFACE

SDI

SFSY

47

SUBCODE

The CD10 needs a clock of 8.4672MHz + 100ppm. This speed

SUB

46

PEAK

PROCESSOR

also relates to the disc speed. To avoid locking problems

RCK

45

DETECT

20

Vneg

between the two drives in the CDR775, both drives run on the

21

Vpos

same clock. Therefore the CD main board gets the clock for the

BITSTREAM 18

DECODER

DAC

LN

decoder from the CDR main board via pin 2 of connector 1208.

19

STATUS

43

MICRO-

LP

CONTROLLER

VERSATILE PINS

22

The DAC needs a system clock to drive its internal digital filters

INTERFACE

RN

INTERFACE

KILL

23

and to clock the I2S signals from the decoder. In our case this

RP

38

is 11.2896MHz (CL11) generated by the CD10.

RESET

63

34

61

62

32

V1

V2/

V4

V5

KILL

CL96532086_051.eps

Measurements

080999

V3

Connect the power supply as described above in "1.1.1.

Supply Voltages".

Figure 8-22

26