8.Faultfinding Guide

8.1Display Board

8.1.1Description of display board

General description

The display board has three major parts : the FTD (Fluorescent Tube Display), the display controller TMP87CH74F and the keyboard. The display controller is controlled by the DASP master processor on the CDR main board. The communication protocol used is I2C. So all the information between DASP and display controller goes via the SDA or I2C DATA and SCL or I2C CLK lines. Communication is always initiated by the DASP on the CDR main board. Unlike the previous generations of CDR players, the interrupt generated by the display controller at key-press or reception of remote control is not used. Instead, the DASP polls the display controller for these events.

Display controller TMP87C874F

TMP87CH74F ( QY01) is a high speed and high performance 8-bit single chip microprocessor, containing 8-bit A/D conversion inputs and a VFT (Vacuum Fluorescent Tube) driver. In this application, its functions are :

slave microprocessor. FTD driver.

generates the square wave for the filament voltage required for an AC FTD.

generates the grid and segment scanning for the FTD. generates the scanning grid for the key matrix. input for remote control.

All the communication runs via the serial bus interface I2C. The display controller uses an 8MHz resonator as clock driver.

BLOCK DIAGRAM

TMP87C874F

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

 

 

 

I/O PORT8

(VFT)

 

 

 

I/O PORT7

(VFT)

 

 

 

 

 

I/O PORT6

(VFT)

 

 

 

65

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

40

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

66

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VAREF

39

67

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

38

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VASS

 

(VFT)

 

 

 

DATA MEMORY

 

PROGR MEMORY

 

 

 

PROGRAM

 

 

 

 

68

 

 

 

 

 

 

 

 

 

 

 

 

37

 

 

 

 

( RAM )

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

( ROM )

 

 

 

COUNTER

 

 

 

 

 

 

69

I/O PORT9

 

 

 

 

512X8 BIT

 

 

 

8kX8 BIT

 

 

 

 

 

 

 

 

 

I/O PORT5

36

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

70

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

35

71

 

 

 

 

 

 

 

 

C P U

 

 

 

 

 

 

 

 

 

 

34

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

72

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

33

73

 

 

 

 

 

16 BIT

 

 

 

INTERRUPT

 

 

 

8 BIT

 

 

 

 

 

32

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

74

I/O PORTD (VFT)

 

 

 

TIMER/COUNTER

 

 

CONTROLLER

 

 

TIMER/COUNTER

 

 

 

 

31

75

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O PORT4

30

76

 

 

8 BIT A/D

 

 

CLOCK/TIMING CONTROLLER

 

 

 

 

 

 

 

29

77

 

 

 

 

 

 

 

 

 

 

 

28

 

 

CONVERT.

 

 

 

 

( I/O PORT2 )

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

78

VKK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

27

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

79

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

26

80

 

I/O PORT0

 

 

VSS1

 

 

 

 

 

 

 

 

 

 

I/O PORT1

 

 

 

2

25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I C

SCK0

 

 

 

 

 

 

 

 

RESETN

 

 

 

 

 

 

 

 

 

 

 

 

 

PORT3

 

 

 

 

 

 

XOUT

XIN

P22

P21

TEST1

P20

INT0

INT1

 

 

 

 

 

 

SCL

SDA

1

2

3

4

5

6

7

8

9165

10

11

129

13

14

 

 

17

18

 

20

21

22

23

24

 

PIN DESCRIPTIONS

INT0

INT1

RESETN

SCL

SDA

TEST

VAREF

VASS

VDD

VKK

VSS

XIN, XOUT

external interrupt input 0

external interrupt input 1

reset signal input, active low

I2C-bus serial clock input/output

I2C-bus serial data input/output

test pin, tied to low

analog reference voltage input

analog reference ground

+5V

VFT driver power supply

ground

resonator connecting pins for high-frequency clock

CL 96532076_028.eps 290799

Figure 8-1

16

Page 18
Image 18
Marantz MAR770, DR-6000 Display Board, Description of display board, General description, Display controller TMP87C874F

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