
5.0Gbps PCI Express Passive Switches
Test Circuits/Timing Diagrams
MAX4888A/MAX4889A
3.3V  | 
tr < 5ns  | 
LOGIC
VIH
tf < 5ns  | 
VN_
  | V+  | 
NO_  | COM_  | 
OR NC_  | 
  | 
SEL  | 
  | 
RL
INPUT
VOUT
CL
VIL
0.9x V0UT
tOFF ![]()
0.9x VOUT
LOGIC INPUT
GND  | 
SWITCH 0V OUTPUT
50%
VOUT
tON
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
MAX4888A/MAX4889A
VOUT = VN_ (  | RL  | )  | 
  | ||
RL + RON  | 
  | |
VN_ = VNO_ OR VNC_
Figure 1. Switching Time
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