
5.0Gbps PCI Express Passive Switches
MAX4888A/MAX4889A
Test Circuits/Timing Diagrams (continued)
  | 
  | 
  | 3.3V  | 
  | 
  | 
  | 
  | 
  | V+  | 
  | 
  | 
RS  | NO_+ OR  | MAX4888A/MAX4889A  | 
  | 
  | |
NC_+  | 
  | COM_+  | 
  | 
  | |
IN+ | 
  | 
  | OUT+ | ||
  | 
  | 
  | RL  | ||
  | 
  | 
  | tSK1 = D I F F E R E N C E I N P R O PA G AT I O N D E L AY ( R I S E - FA L L )  | ||
RS  | NO_- OR  | 
  | 
  | BETWEEN ANY TWO PAIRS  | |
  | COM_-  | 
  | 
  | ||
NC_-  | 
  | tSK2 = tPLHX - tPHLY OR tPHLX - tPLHY  | |||
IN-  | 
  | ||||
  | 
  | OUT-  | BETWEEN TWO LINES ON THE SAME PAIR  | ||
  | 
  | 
  | 
  | ||
  | 
  | 
  | RL  | 
  | 
  | 
  | 
  | 
  | SEL | 
  | 
  | 
  | 
  | 
  | tINRISE  | 
  | tINFALL  | 
1.5V  | 
  | 
  | 
  | 90%  | 90%  | 
VIN+  | 
  | 
  | 
  | ||
50%  | 50%  | 
  | 
  | ||
  | 
  | 
  | |||
0V  | 
  | 
  | 10%  | 
  | 10%  | 
  | 
  | 
  | 
  | 
  | |
1.5V  | 
  | 
  | 
  | 
  | 
  | 
VIN-  | 50%  | 50%  | 
  | 
  | |
0V  | 
  | 
  | 
  | 
  | 
  | 
  | 
  | 
  | tOUTRISE  | tOUTFALL  | |
tPLHX  | 
  | 
  | tPHLX  | 
  | 
  | 
1.5V  | 
  | 
  | 
  | 90%  | 90%  | 
  | 
  | 
  | 
  | ||
VOUT+  | 
  | 50%  | 50%  | 
  | 
  | 
0V  | 
  | 
  | 10%  | 10%  | |
  | 
  | 
  | 
  | 
  | |
1.5V  | 
  | 
  | 
  | 
  | 
  | 
VOUT-  | 
  | 50%  | 50%  | 
  | 
  | 
0V  | 
  | 
  | 
  | 
  | 
  | 
tPHLY  | 
  | 
  | tPLHY  | 
  | 
  | 
Figure 2. Propagation Delay and Output Skew
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