Measurement Specialties PCI-2513 Digital I/O , Triggering

PCI-2513 User's Guide Functional Details

Digital I/O

Twenty-four TTL-level digital I/O lines are included in each PCI-2513. You can program digital I/O in 8-bit

groups as either inputs or outputs and scan them in several modes (see "Digital input scanning" below). You can

access input ports asynchronously from the PC at any time, including when a scanned acquisition is occurring.

Digital input ports can be read asynchronously before, during, or after an analog input scan.

Digital input ports can be part of the scan group and scanned along with analog input channels. Two

synchronous modes are supported when digital inputs are scanned along with analog inputs.

In both modes, adding digital input scans has no affect on the analog scan rate limitations.

If no analog inputs are being scanned, the digital inputs can be scanned at up to 12 MHz.

Digital outputs can be updated asynchronously at anytime before, during, or after an acquisition. You can use

two of the 8-bit ports to generate a digital pattern at up to 12 MHz. The PCI-2513 supports digital pattern

generation with bus mastering DMA. The digital pattern can be read from PC RAM.

Digital pattern generation is clocked using an internal clock. The on-board programmable clock generates

updates ranging from once every 1 second to 1 MHz, independent of any acquisition rate.

Triggering

Triggering can be the most critical aspect of a data acquisition application. The PCI-2513 supports the

following trigger modes to accommodate certain measurement situations.

The PCI-2513 uses true analog triggering in which the trigger level you program sets an analog DAC, which is

then compared in hardware to the analog input level on the selected channel. This guarantees an analog trigger

latency that is less than 1 µs.

You can select any analog channel as the trigger channel, but the selected channel must be the first channel in

the scan. You can program the trigger level, the rising or falling edge, and hysteresis.

Concerning hardware analog level trigger and comparator change state

When analog input voltage starts near the trigger level, and you are performing a rising or falling] hardware

analog level trigger, the analog level comparator may have already tripped before the sweep was enabled. If this

is the case, the circuit waits for the comparator to change state. However, since the comparator has already

changed state, the circuit does not see the transition.

To resolve this problem, do the following:

1. Set the analog level trigger to the threshold you want.

2. Apply an analog input signal that is more than 2.5% of the full-scale range away from the desired

threshold. This ensures that the comparator is in the proper state at the beginning of the acquisition.