Motorola MC68030 Cycle, 33.33MHz, 2 0 M H z, 2 5 M H z, 4 0 M H z, 5 0 M H z, M i n, M a

AC ELECTRICAL SPECIFICATIONS - - READ A N D WRITE CYCLES•

( V c c . =	5 . 0 V d c	- + 5 % ;		G N D = 0		V d c ;	4 0	M H z - T A		= 0 ° t o		70°C,		5 0	M H z - T A		=0° . C t o		T C = 8 0 ° C )
( s e e . . F i g u r e s . 3 - 8 )
Num."			Characteristic						2 0 M H z			2 5 M H z			.33.33MHz				4 0 M H z		5 0 M H z *		U n i t
									M i n	M a x		M i n		M a x	M i n		M a x	M i n		M a x	M i n
																						M a x • -
6	C!ock'High to Function Code,							I,	0	25		0		20	0		14		O	14	0	14	ns
	Size, R M C , IPEND,
	CLOUT, A d d r e s s Valid
6A	Clock,High		to EC~,		OCS	' ,			0	15		0		i 5	0		12		0	10	0	10	ns
	• A s s e r t e d																	I
6B '	Functioni~ode,'Size, R M C , '								4	- -		3		- -	3		- -	'I	3	- -	3	- -	ns
	IPEND, CLOUT A d d r e s s
	Valid to Negating Edge of ECS
7	Clock High to Function Code,								O	50		O		" 40	O		30		0	25	0	20	ns
	Size, RMC, CLOUT,
	A d d r e s s		Data	High
	I m p e d a n c e
.8	Clock High		to Fu'nction Code,						O	- -		0		- -	O		- -		0	- -	0	- -	. ns
	Size, RMC, IPEND,
	CLOUT, A d d r e s s Invaiid
9	Clock L o w		to AS, D'SAsserted,						3	20		3		18	2		10	2		10	2	10	.ns
	CBREQ Valid
9 A 1	AS t o D S	A s s e r t i o n			S k e w	(Read)			- 1 0	10"		- 1 0		10	- 8		8		: 6	6	- 6	6	ns
9B! 4	A T Asserted to D ~ Asserted								32	- -		27		- -	22		- -		16	- -	14	- - .	ns
	(Wri.te)
10	ECS W i d t h		Asserted						15	- -		10		- -	8		- -		5 "	- -	4	- -	ns
"10A	OCS W i d t h Asserted								15	- -		10		- -	8		" - -		5	- -	4	- -	ns
1087	ECS, OCS W i d t h			Negated					10	- -		5		- -	5		- -		5	- -	4	- -	ns
11	Function	Code,		Size, RMC,					IO	- -		7		- -	5 .		- -		5 "	- -	3	- -	ns
	CLOUT, A d d r e s s Valid to
	Asserting Edge of A S
	Asserted		(arid	DS Asserted,
	Read)
12	Clock L o w		to AS, DS, C e R E Q '						'O	20		O		18	' O		10	"O . . . .		10"	O	10'	" ns
	Negated
12A	Clock L o w to ECS/OCS Negated								0	20		O		18	0		15		0	12	' 0	11	ns'
13,	AS, DS Negated to Function								1O	- -		7		- -	5		: - -		3	- - ~	3	- -	ns
	Code,	Size, RMC, CLOUT,
	A d d r e s s		Invalid		.	.	.	.	.	.	.	.	.	.	.	.	.
14	AS (and DS Read) W i d t h								85	- -		70		- -	4 5 ,		- - '		30	- -	25	- -	ns

'Asserted (Asynchronou's . . . . .

Cycle)

~4A 11	D~	Width Asse'rted(Write)		" '	38	"	~	30	- -	23"	- -	18	m	- 13	7	ns
14B "	AS	(and'DS, Read) Width'			35		- -	30	- -	23	' - -	"18	- -	13	- -	ns
. .	Asserted ( S y n c h r o n o u s
	Cycle)
,15'	AS,	D S W i d t h	Negated	' "	38		- -	30	- -	23	- -	1 8	~	. 1 3	- -	. n s
_ .15A8	~	N e g a i e d to	A T Assertecl ..		30		- -	25	- -	18.	- -	16	. .	:1~'"	- -	ns

16 Clock High to AS, DS, R/W,- - 504030 - - 25 I - - 20 ns

DBEN, CBREQ High I m p e d a n c e I

6 M C 6 8 0 3 0 E L E C T R I C A L ! S P E C I F . I C A T I O N S M O T O R O L A