Motorola SC140 user manual Control Code The True Bit Exercise

Compiler Support on StarCore

Table 3. Inner Loop Characteristics of Multi-sample and Single-sample Techniques. (Continued)

Characteristic	Single-sample Algorithm	Multi-sample Algorithm
Number of memory moves (bandwidth)	2N	N/2
Code size	Small	Large

7 Control Code: The True Bit Exercise

The True bit exercise shows how the compiler uses the True bit and how you can help the compiler to improve the performance. The True bit is set/cleared by compare or test instructions. The use of the True bit as a control flag together with DSP-specific code makes the SC140 very powerful for applications including both control and DSP code. The True bit can affect conditional branching as well as conditional execution of groups of instructions.

Conditional branching includes:

•BT/BF: Branch relative if True bit is True/False.

•BTD:BFD: Branch delayed relative if True bit is True/False.

•JT/JF: Jump if True bit is True/False.

•JTD/JFD: Jump delayed if True bit is True/False. Conditional execution of instructions includes:

•IFT/IFF: IF True bit is True/False.

•IFA: IF always, which is unconditionally executed with IFT/IFF.

The conditional execution set combinations are very flexible and are represented in Figure 10, which represents the maximum number of ALUs (that is, two) and one Arithmetic Address Unit (AAU) per subset. The C compiler automatically generates the conditional execution set, and some examples are provided to highlight potential code optimization.

IFA

ALU1 ALU2 AAU1

IFT

ALU3 ALU4 AAU2

IFT

ALU1 ALU2 AAU1

IFF

ALU3 ALU4 AAU2

IFA

ALU1 ALU2 AAU1

IFF

ALU3 ALU4 AAU2

Figure 10. Control Instructions Using the True Bit

Introduction to the SC140 Tools 21