MS-9641 Mainboard
Signal Action
Segment | Signal Name | Description | Type | Bypass | Pass Through |
| RELAY_SET1# | Enable LAN1 bypass | Output | 1 | 0 |
Segment 1 | RESET_RESET1# | Enable LAN1 bypass | Output | 0 | 1 |
| BYPASS1_LED# | Enable LAN1 bypass LED | Output | 1 | 0 |
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| RELAY_SET2# | Enable LAN2 bypass | Output | 1 | 0 |
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RESET_RESET2# | Enable LAN2 bypass | Output | 0 | 1 | |
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| BYPASS2_LED# | Enable LAN2 bypass LED | Output | 1 | 0 |
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| RELAY_SET3# | Enable LAN3 bypass | Output | 1 | 0 |
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RESET_RESET3# | Enable LAN3 bypass | Output | 0 | 1 | |
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| BYPASS3_LED# | Enable LAN3 bypass LED | Output | 1 | 0 |
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| RELAY_SET4# | Enable LAN4 bypass | Output | 1 | 0 |
Segment 4 | RESET_RESET4# | Enable LAN4 bypass | Output | 0 | 1 |
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| BYPASS4_LED# | Enable LAN4 bypass LED | Output | 1 | 0 |
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2.WDTO# to Bypass Control Mask Register Mask WDTO# input for bypass mode
When WDTO# pin inputs 0, watchdog timeout occurs. This register sets watchdog timeout behavior for Segment 1~4.
WDTO# - Input from Super I/O WDTO# Default Value: 0x00
WDTO# to Bypass Control Mask Register
7 | 6 |
| 5 | 4 | 3 | 2 |
| 1 | 0 | ||||
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X | R/W |
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| R/W | R/W | R/W |
| R/W | R/W | |||
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GPIO sel | SMI |
| Reset | Path sel | Segment 4 | Segment 3 |
| Segment 2 | Segment 1 | ||||
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| WDTO# Input |
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| Segment bit (bit 0~4) |
| Mode |
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| 0 |
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| 1 |
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| No Change |
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| 0 |
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| 0 |
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| 1 |
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| X |
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| No Change |
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Bit Definition
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| WDTO# to Bypass Control Mask Register | |||
Bit Field | Name |
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3：0 | Segment |
| WDTO# to Bypass Control Segment bit mask. Each bit | ||
| 1 to 4 |
| corresponds to a specific segment numbered 1 thru 4. | ||
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| 1: When WDTO# active, then set Segment Bypass Mode | ||
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| 0: When WDTO# active, no action | ||
4 | Path sel |
| 0：LPC Control LAN |
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| 1：GPIO Control LAN |
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5 | reserved |
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6 | reserved |
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7 | GPIO sel |
| 0：GPIO38 and GPIO39 ：control LAN1，LAN2 | ||
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| （1→ BYPASS | 0→Pass Through） | |
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| 1：GPIO38 control LAN1，GPIO39 control LAN2 ： | ||
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| （GPIO38：1→ BYPASS | 0→Pass Through | |
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| GPIO39：1→ BYPASS | 0→Pass Through） | |
