© National Instruments Corporation 13 NI PXI/PCI-5124 Specifications
Horizontal

Sample Clock

Specification Valu e Comments
Sources NI PXI-5124 NI PCI-5124 * Internal
Sample Clock is
locked to the
Reference Clock
or derived from
the onboard
VCXO
Internal, Onboard Clock
(internal VCXO)*
External, CLK IN (front
panel SMB connector)
External,
PXI Star Trigger
(backplaneconnector)
Internal, Onboard Clock
(internal VCXO)*
External, CLK IN (front
panel SMB connector)
Onboard Clock (Internal VCXO)
Sample Rate
Range
Real-Time Sampling
(Single Shot)
Random Interleaved
Sampling (RIS)
* Divide by
ndecimation
used for all rates
less than
200 MS/s
For more
information
about Sample
Clock and
decimation,
refer to the
NIH igh-Speed
Digitizers Help.
3.052 kS/s to 200 MS/s*400 MS/s to 4 GS/s in
multiples of 200MS/s
Phase Noise
Density, Typical
<–100 dBc/Hz at 100 Hz
<–120dBc/Hz at 1kHz
<–130 dBc/Hz at 10 kHz
10 MHz input
signal