National Instruments NI PXIe-1065 PXI Trigger Bus

Chapter 1 Getting Started

NI PXIe-1065 User Manual 1-10 ni.com

Local bus signals may range from high-speed TTL signals to analog signals

as high as 42 V.

Initialization software uses the configuration information specific to each

adjacent peripheral module to evaluate local bus compatibility.

Figure 1-4. PXI Trigger Bus and Local Bus Connectivity Diagram

PXI Trigger Bus

All slots on the same PXI bus segment share eight PXI trigger lines. You

can use these trigger lines in a variety of ways. For example, you can use

triggers to synchronize the operation of several different PXI peripheral

modules. In other applications, one module located in the system timing

slot can control carefully timed sequences of operations performed on other

modules in the system. Modules can pass triggers to one another, allowing

precisely timed responses to asynchronous external events the system is

monitoring or controlling.

The PXI trigger lines from adjacent PXI trigger bus segments can be routed

in either direction across the PXI trigger bridges through buffers. This

allows you to send trigger signals to, and receive trigger signals from, every

slot in the chassis. Static trigger routing (user-specified line and directional

P2

P1

XP4

XP3

TP2

TP1

P2

P1

P2

P1

P2

P1

P1

P1

P1

XP4

XP3

XP4

XP3

XP4

XP3

XP4

XP3

XP4

XP3

XP4

XP3

XP4

XP3

P2

P1

P2

P1

P2

P1

P2

P1

P2

P1

P1

XP4

XP3

XP2

XP1

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB6

PXI_LB (12:0)

PXI_LB (12:0)

PXI_LB (12:0)

PXI_LB (12:0)

PXI_LB (12:0)

PXI_LB (12:0)

PXI_LB (12:0)

PXI

Trigger Bus

Buffer Bridge

PXI

Trigger Bus

Buffer Bridge

PXI Trigger Bus Segment 1 PXI Trigger Bus Segment 2 PXI Trigger Bus Segment 3

1

8

9

10

7H11HH

12 H

1314 15

65

4

3

216 17 18

Contents

Main Page Important Information Warranty Copyright Trademarks Patents Contents About This Manual Chapter 1 Getting Started Chapter 2 Installation and Configuration Page About This Manual Conventions Related Documentation Getting Started Unpacking What You Need to Get Started Key Features Page Chassis Description Figure 1-1. Front View of the NI PXIe-1065 Chassis Optional Equipment EMC Filler Panels Rack Mount Kit Slot Blockers NI PXIe-1065 Chassis Backplane Overview Interoperability with CompactPCI System Controller Slot Hybrid Peripheral Slots PXI Peripheral Slots PXI Express Peripheral Slots System Timing Slot Chapter 1 Getting Started PXIe_DSTAR 1 1 216 17 18 PXI Local Bus PXIe_DSTAR 8 PXIe_DSTAR 1 8 10 7H11HH PXI Trigger Bus System Reference Clock Chapter 1 Getting Started NI PXIe-1065 User Manual 1-12 ni.com Figure 1-5. Distribution of PXI_CLK10, PXIe_CLK100, and PXIe_SYNC100 Figure 1-6. System Reference Clock Default Behavior PXIe_CLK100 PXI_CLK10 PXIe_SYNC100 Page PXIe_SYNC_CTRL Installation and Configuration Safety Information Chassis Cooling Considerations Providing Adequate Clearance Figure 2-1. NI PXIe-1065 Cooling Clearances Chassis Ambient Temperature Definition Setting Fan Speed Installing Filler Panels Installing Slot Blockers Rack Mounting Connecting Safety Ground Connecting to Power Source Installing a PXI Express System Controller Page Installing Peripheral Modules Page Power Inhibit Switch LED Indicator Remote Voltage Monitoring and Control Page Inhibit Mode Switch PXI_CLK10 Rear Connectors PXI Express System Configuration with MAX PXI-1 System Configuration Trigger Configuration in MAX PXI Trigger Bus Routing Using System Configuration and Initialization Files Maintenance Service Interval Preparation Cleaning Interior Cleaning Resetting the AC Mains Circuit Breaker Replacing the Modular Power Supply Removal Installation Page A Specifications Electrical AC Input DC Output Chassis Cooling Environmental Operating Environment Storage Environment Shock and Vibration Acoustic Emissions Sound Pressure Level (at Operator Position) Sound Power Safety Electromagnetic Compatibility CE Compliance RoHS Page External 10 MHz Reference Out (BNC on rear panel of chassis) External Clock Source PXIe_SYNC_CTRL PXI Star Trigger PXI Differential Star Triggers (PXIe-DSTARA, PXIe-DSTARB, PXIe-DSTARC) Mechanical Page Figure A-1. NI PXIe-1065 Chassis Dimensions (Front and Side) Figure A-2. NI PXIe-1065 Chassis Dimensions (Bottom) Page B Pinouts System Controller Slot Pinouts Pins Signals System Timing Slot Pinouts National Instruments Corporation B-3 NI PXIe-1065 User Manual Table B-4. XP4 Connector Pinout for the System Controller Slot Table B-5. TP1 Connector Pinout for the System Timing Slot Table B-3. XP3 Connector Pinout for the System Controller Slot (Continued) Table B-6. TP2 Connector Pinout for the System Timing Slot Table B-7. XP3 Connector Pinout for the System Timing Slot Table B-8. XP4 Connector Pinout for the System Timing Slot National Instruments Corporation B-5 NI PXIe-1065 User Manual Peripheral Slot Pinouts Table B-9. P1 Connector Pinout for the Peripheral Slot NI PXIe-1065 User Manual B-6 ni.com Table B-10. P2 Connector Pinout for the Peripheral Slot National Instruments Corporation B-7 NI PXIe-1065 User Manual Hybrid Slot Pinouts Table B-11. P1 Connector Pinout for the Hybrid Slot NI PXIe-1065 User Manual B-8 ni.com Table B-12. XP3 Connector Pinout for the Hybrid Slot Table B-13. XP4 Connector Pinout for the Hybrid Slot C Technical Support and Professional Services Page Glossary Symbols A B C D Page J K L M Page Page Index A B C D F G H I K O P R S T