Chapter 1 Getting Started
© National Instruments Corporation 1-11 NI PXIe-1065 User Manual
assignments) can be configured through Measurement & Automation
Explorer (MAX). Dynamic routing of triggers (automatic line assignments)
is supported through certain National Instruments drivers like NI-DAQmx.
Note Although any trigger line may be routed in either direction, it cannot be routed in
more than one direction at a time.
System Reference Clock
The PXIe-1065 chassis supplies the PXI 10 MHz system clock signal
(PXI_CLK10) independently driven to each peripheral slot and
PXIe_CLK100 and PXIe_SYNC100 to the PXI Express slots, hybrid slots,
and system timing slot.
An independent buffer (having a source impedance matched to the
backplane and a skew of less than 1 ns between slots) drives PXI_CLK10
to each peripheral slot. Refer to Figure 1-5 for the routing configuration of
PXI_CLK10. You can use this common reference clock signal to
synchronize multiple modules in a measurement or control system.
An independent buffer drives PXIe_CLK100 to the PXI Express peripheral
slots, hybrid peripheral slots, and system timing slot. Refer to Figure1-5
for the routing configuration of PXIe_CLK100. These clocks are matched
in skew to less than 100 ps. The differential pair must be terminated on the
peripheral with LVPECL termination for the buffer to drive PXIe_CLK100
so that when there is no peripheral or a peripheral that does not connect to
PXIe_CLK100, there is no clock being driven on the pair to that slot.
An independent buffer drives PXIe_SYNC100 to the PXI Express
peripheral slots, hybrid peripheral slots, and system timing slot. Refer
to Figure 1-5 for the routing configuration of PXIe_SYNC100. The
differential pair must be terminated on the peripheral with LVPECL
termination for the buffer to drive PXIe_SYNC100 so that when there is
no peripheral or a peripheral that does not connect to PXIe_SYNC100,
there is no SYNC100 signal being driven on the pair to that slot.