Chapter 4 Signal Connections
IMAQ PCI-1428 User Manual 4-4 ni.com
Y<3..0>± LVDS Medium configuration data and enable signals from the acquisition
device to the camera
XCLK± Transmission clock on the Base configuration chip for Camera Link
communication between the acquisition device and the camera
YCLK± Transmission clock on the Medium configuration chip for Camera Link
communication between the acquisition device and the camera
SerTC± Serial transmission to the camera from the image acquisition device
SerTFG± Serial transmission to the frame grabber from the camera
CC<4..1>± Four LVDS pairs (defined as camera inputs and acquisition device outputs)
reserved for camera control
On some cameras, the camera controls allow the acquisition device to control
exposure time and frame rate.
Table 4-1. I/O Connector Signals (Continued)
Signal Name Description