CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
User’s Manual U15447EJ1V0UM
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Figure 5-1. Equivalent Circuit of Emulation Circuit (2/5)Probe side IE system side
P50/AD8
P51/AD9
P52/AD10
P53/AD11
P54/AD12
P55/AD13
P56/AD14
P57/AD15
QS3384 OUT
IN
PD703091R
FPGA
OR2T40A
IN/OUT
QS3384 Connector
P60/AD16
P61/AD17
P62/AD18
P63/AD19
P64/AD20
P65/AD21
QS3384 OUT
IN
PD703091R
FPGA
OR2T40A
OUT
QS3384 Connector
74VHC125
74VHC125
PD70F3079Y
P70/ANI0
P71/ANI1
P72/ANI2
P73/ANI3
P74/ANI4
P75/ANI5
P76/ANI6
P77/ANI7
IN
IN
P80/ANI8
P81/ANI9
P82/ANI10
P83/ANI11
(AD15 to AD8)
(P57 to P50)
(A21 to A16)
(P65 to P60)
QS3384 OUT
IN
PD703091R
FPGA
OR2T40A
OUT
QS3384 Connector
74VHC125
P90/LBEN
P91/UBEN
P92/R/W
P93/DSTB
P94/ASTB
P95/HLDAC
(P95 to P90)
(HLDAC to LBEN)
µ
µ
µ
µ