CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
User’s Manual U15447EJ1V0UM 31
Figure 5-1. Equivalent Circuit of Emulation Circuit (3/5)Probe side IE system side
P96/HLDRQ
PD70F3079Y
IN/OUT
P100/KR0/TO7
P101/KR1/TI70
P102/KR2/TI00
P103/KR3/TI01
P104/KR4/TO0
P105/KR5/TI10
P106/KR6/TI11
P107/KR7/TO1
QS3384 OUT
IN
PD703091R
FPGA
OR2T40A
IN
QS3384 Connector
74VHC125
(P96)
(HLDRQ)
IN
OUT
FPGA
OR2T40A
74VHC125
QS3384
P110/WAIT
P111
P112
P113
IN
OUT PD70F3079F
FPGA
OR2T40A
OUT
QS3384
74VHC125
P114/CANTX1
P116/CANTX2 QS3384
IN
IN PD70F3079Y
FPGA
OR2T40A
OUT
74VHC125
P115/CANRX1
P117/CANRX2 QS3384
µ
µ
µ
µ