Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
The supply for the logic and overload protection is taken from the input.
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VIS(TO) Input threshold voltage VDS = 5 V; ID = 1 mA 0.6 - 2.4 V
Tmb = 25˚C 1.1 1.6 2.1 V
IIS Input supply current normal operation; VIS = 5 V 100 220 400 µA
VIS = 4 V 80 195 330 µA
IISL Input supply current protection latched; VIS = 5 V 200 400 650 µA
VIS = 3 V 130 250 430 µA
VISR Protection reset voltage1reset time tr ≥ 100 µs 1.5 2 2.9 V
tlr Latch reset time VIS1 = 5 V, VIS2 < 1 V 10 40 100 µs
V(CL)IS Input clamping voltage II = 1.5 mA 5.5 - 8.5 V
RIG Input series resistance2Tmb = 25˚C- 33 - kΩ
to gate of power MOSFET
SWITCHING CHARACTERISTICSTmb = 25˚C; VDD = 13 V; resistive load RL = 4 Ω. Refer to waveform figure and test circuit.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
td on Turn-on delay time VIS = 5 V - 25 50 µs
trRise time - 50 100 µs
td off Turn-off delay time VIS = 0 V - 60 120 µs
tfFall time - 50 100 µs
1 The input voltage below which the overload protection circuits will be reset.
2 Not directly measureable from device terminals.
May 2001 4 Rev 1.000