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Omron CPM2B, Programmable Controller 2-3 I/O Connector and Terminal Pin Allocation

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2-3SectionI/O Connector and Terminal Pin Allocation

33

Note Do not touch the cables during operation to prevent unexpected op-

eration due to static discharge.

2-3 I/O Connector and Terminal Pin Allocation

CPU Boards

Inputs (24 V DC)

CPU Board with relay outputs CPU Board with transistor outputs

Sinking transistor

outputs

Relay outputs

IR 010 IR 011

IR 001 IR 000

03 02 01 00 COM 03 02 01 00 COM

07 06 05 04 NC 07 06 05 04 NC

00 01 02 03 COM 04 05 06 07 COM

11000010203

COM 04 05 06 07 COM

110

00 01 02 03 COM 00 01 02 03 COM

04 05 06 07 04 04 06 07

COM COM

Contents

Main Page v Notice: DANGER WARNING OMRON Product References Visual Aids Page TABLE OF CONTENTS ix About this Manual: WARNING xi PRECAUTIONS 3Safety Precautions xii 1 Intended Audience 2 General Precautions WARNING 3 Safety Precautions WARNING 4 Operating Environment Precautions 5 Application Precautions WARNING 5Application Precautions xiv xv 6 EC Directives 6-1 Applicable Directives 6-2 Concepts xvi 6-3 Conformance to EC Directives 6-4 Relay Output Noise Reduction Methods Countermeasures xvii Countermeasure Examples SECTION 1 Introduction 2 1-1 CPM2B Features and Functions 1-1-1 CPM2B Features Basic Functions Built-in Motor Control Capability 3 High-speed Input Capabilities for Machine Control Other Functions 4 Complete Communications Capabilities 1-1-2 Overview of CPM2B Functions 1-2 System Configurations 1-2-1 CPU Boards 1-2-2 Expansion I/O Boards 1-2-3 Connecting a Programming Console 1-2-4 Support Software 1-2-5 One-to-one Computer Connections 1-2-6 One-to-N Computer Connections 1-2-7 OMRON PT Connections 1-2-8 One-to-one PC Link Connections 1-3 Structure and Operation 1-3-1 CPU Board Structure 1-3-2 Operating Modes 1-3-3 Operating Mode at Startup 1-3-4 PC Operation at Startup 1-3-5 Cyclic Operation and Interrupts Basic CPU Operation Page Page Page Page 2-1 Specifications 2-1-1 General Specifications 2-1-2 Characteristics Page 25 2-1-3 I/O Specifications CPU Board Input Specifications Max. Number of Inputs Simultaneously ON 2. Installation orientation: Vertical with end down 3. Installation orientation: Horizontal The minimum pulse width for input IN00002 (Z-phase input) is as follows: High-speed Counter Inputs 27 Interrupt Inputs Expansion I/O Board Input Specifications CPU Board and Expansion I/O Board Output Specifications Relay Outputs Page 2-2 Board Components and their Functions 2-2-1 CPU Board Components CPU Boards with Relay Outputs CPU Boards with Transistor Outputs Page Page 2-2-2 Expansion I/O Boards 2-3SectionI/O Connector and Terminal Pin Allocation 33 2-3 I/O Connector and Terminal Pin Allocation CPU Boards 2-3SectionI/O Connector and Terminal Pin Allocation 34 Expansion I/O Boards SECTION 3 Installation and Wiring 3-2SectionSelecting an Installation Site 36 3-1 Design Precautions 3-1-1 Power Supply Wiring 3-1-2 Power Supply Voltage 3-1-3 Interlock and Limit Circuits WARNING 3-2-1 Installation Site Conditions 3-2-2 Panel/Cabinet Installation 3-3SectionAssembling the CPM2B Boards 38 3-3 Assembling the CPM2B Boards 3-4SectionInstalling the CPM2B 39 3-4 Installing the CPM2B 40 3-5 Wiring and Connections General Precautions for Wiring 3-5-1 Power Supply Wiring 42 3-5-2 I/O Wiring Procedures Removing and Wiring I/O Terminal Blocks 43 Removing and Wiring I/O Connectors Page 3-5-3 Connecting Input Devices Expansion I/O Boards (All Models) The following table shows how to connect various input devices. Input Devices Device Circuit diagram Relay output NPN open collector NPN current output PC Setup Settings Special functions for input bits IR 00003 through IR 00006 are set in DM 6628: Inductive Loads High-speed Counter Input Connection Examples Leakage Current ! 3-5-4 Output Wiring Relay Output Wiring WARNING 2 A (250 V AC or 24 V DC) 4 A/common Expansion I/O Boards with Relay Outputs CPU Boards with Sinking Transistor Outputs 01000, 01001: 200 mA (30 V DC) 01002 and up: 300 mA (30 V DC) 300 mA (30 V DC) 1.2 A/common 1.2 A/common Expansion I/O Boards with Sinking Transistor Outputs Page Page Page 4-1SectionIntroduction 54 4-1 Introduction 4-1-1 Functions 4-2 I/O Allocation Page Page 4-3SectionSR Area 58 4-3 SR Area 4-3SectionSR Area 59 4-4 AR Area Page Page Page 4-5 PC Setup 4-5-1 Changing the PC Setup Errors in the PC Setup 4-5-2 PC Setup Settings Page Page Page 4-6SectionError Log 69 4-6 Error Log 4-6SectionError Log 70 Page 5-1SectionCPM2B Function Codes 72 5-1 CPM2B Function Codes Left Right digit digit 0 1 2 3 4 5 6 7 8 9 0 1 2 3 5-2 Alphabetic List by Mnemonic Page Page 5-3SectionExpansion Instructions 76 5-3 Expansion Instructions SECTION 6 Using Programming Devices 6-1 Using a Programming Console 6-1-1 Compatible Programming Consoles Page 6-1-2 Changing the CPM2Bs Mode with the Mode Switch 6-1-3 Connecting the Programming Console 6-1-4 Preparation for Operation 6-1-5 Entering the Password 6-2 Programming Console Operations 6-2-1 Overview 6-2-2 Clearing Memory 6-2-3 Reading/Clearing Error Messages 6-2-4 Buzzer Operation 6-2-5 Assigning Expansion Instruction Function Codes 6-2-6 Setting and Reading a Program Memory Address and Monitoring I/O Bit Status 6-2-7 Entering or Editing Programs Page Page 6-2-8 Instruction Search 6-2-9 Bit Operand Search 6-2-10 Inserting and Deleting Instructions 6-2-11 Checking the Program 6-2-12 Bit, Digit, Word Monitor Page 6-2-13 Differentiation Monitor 6-2-14 Binary Monitor 6-2-15 Three-Word Monitor 6-2-16 Signed Decimal Monitor 6-2-17 Unsigned Decimal Monitor 6-2-18 Three-Word Data Modification 6-2-19 Changing Timer, Counter SV 6-2-20 Hexadecimal, BCD Data Modification 6-2-21 Binary Data Modification 6-2-22 Signed Decimal Data Modification 6-2-23 Unsigned Decimal Data Modification 6-2-24 Force Set, Reset 6-2-25 Clear Force Set/Reset 6-2-26 Hex-ASCII Display Change 6-2-27 Displaying the Cycle Time 6-2-28 Reading and Setting the Clock 6-3 Programming Example 6-3-1 Preparatory Operations Page 6-3-2 Example Program 6-3-3 Programming Procedures Page 6-3-4 Checking the Program 6-3-5 Test Run in MONITOR Mode SECTION 7 Test Runs and Error Processing 7-2SectionCPM2B Test Run Procedure 114 7-1 Initial System Checks and Test Run Procedure 7-1-1 Initial System Checks 7-1-2 Flash Memory Precautions 7-2 CPM2B Test Run Procedure 7-3 Self-diagnostic Functions 7-3-1 Identifying Errors WARNING 7-3-2 User-defined Errors 7-3-3 Non-fatal Errors 7-3-4 Fatal Errors 7-4 Troubleshooting Flowcharts Use the following flowcharts to troubleshoot errors that occur during operation. Main Check Power Supply Check Fatal Error Check Non-fatal Error Check 122 I/O Check The I/O check flowchart is based on the following ladder diagram section. A 123 A Environmental Conditions Check 7-5SectionMaintenance Inspections 125 7-5 Maintenance Inspections 7-6SectionBattery Replacement 126 7-6 Battery Replacement WARNING Page Appendix A Standard Models CPU Boards Accessories: Four studs, four M3 screws Expansion I/O Boards Accessories: Four long studs, four M3 screws I/O Connectors Communications Port Connecting Cables Peripheral Devices Appendix AStandard Models 131 Maintenance Accessories Adapters and Connecting Cables (1:1 Connection) Adapters and Connecting Cables (1:N Connections) Appendix B Dimensions All dimensions are in millimeters. CPU Boards and Expansion I/O Boards Mounting Bracket (CPM2B-ATT01) Assembly Dimensions Index Numbers A B C D IL M N O PR S T U VW