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Panasonic Generation Plasma Display Television manual Table of Contents, Subject, Page #

Models: Generation Plasma Display Television

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Table of Contents

Table of Contents

Subject	Page #	Subject	Page #

2007 Panasonic Plasma Line-up	5	Troubleshooting (No Power/Dead Unit) Part 2	56

Models Comparison	6	SOS Circuit Overview	59

High Resolution (FULL-HD Panel)	9	DRV_RST SOS	62

TH-42PX75U Board Layout & Description	13	Location of Q9302	63

TH-42PX75U Board Layout (Pictorial)	14	Close-up View of Q9302	64

2006/2007 Signal Process/Switching Circuit	15	5 Blinks SOS (1)	66

Overall Block Diagram	16	SOS (Drive-reset)	68

Standby Circuit	21	D & C Boards Connection	69

STB5V/STB3.3V Distribution	25	12 Blinks SOS	70

Main CPU VCC Supply (A Board)	28	Signal Circuit Overview	75

TV_SUB_ON/TUNER_SUB_ON	30	Video Process Block Diagram	77

TV_SUB_ON (F_STB_ON)	32	D Board Block Diagram	79

TV_SUB_ON (Relay Drive Circuit)	34	Panel Drive (TH-42PX75U)	81

PFC Circuit	36	Audio Process Block Diagram	83

ACFB (Active Clamp Full Bridge Switching) Circuit	37	Self-Check Function	88

MAIN/SUB Voltages	39	How to Reset the Unit	89

F+15V, DTV9V, SUB5V SOS Detect Circuit	41	Self-Check Menu	90

Power On Operation	43	Check point	91

P15V/P5V Circuit	51	Serviceman Mode	92

Vsus/Vda Circuit	53	Serviceman Mode Menu and Navigation	93

Troubleshooting (No Power/Dead Unit) Part 1	55	Internal Test Patterns	95

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Panasonic Generation Plasma Display Television manual Table of Contents, Subject, Page #

Contents

National Training Panasonic Service and Technology CompanyTechnical Guide 10th Generation Plasma Display TelevisionNational Training Panasonic Service and Technology CompanyPanasonic Service and Technology Company Prepared by Cesar Perdomo and Jean MagloireSubject Table of ContentsSubject Page #Table of Contents Continued Driver Setup Adjustment Initialization Pulse AdjustmentQuick adjustment after P.C.B. exchange 2007 Panasonic Plasma Line-up Models Comparison Models Comparison Models Comparison Image resolution about twice as high *When compared to the 50PX600 High Resolution FULL-HD PanelAbout Twice the Resolution of a Standard HD PDP HD PDP approx. 1,050,000 pixelsPage 10th Generation Plasma Television Board LayoutPage TH-42PX75U Boards Layout & Description TH-42PX75U Board Layout Pictorial 2006/2007 Signal Process/Switching Circuit Overall Block Diagram Overall Block Diagram Page 10th Generation Plasma Television Power SupplyPage Standby Circuit Standby Circuit 1. When the TV is connected to the AC line, the power supply outputsStandby Circuit Standby Circuit When AC is applied to the TV, the Standby circuit outputs 5Vdc and 12Vdc. The 5V is applied to the Power MCU and the switching transistor Q537 of the power supply circuit. The 12V is provided to the SS board. A jumper at connector SS34 of the SS board routes the 12V back into the power supply board to turn on Q537. When Q537 is on, the STB5V is output to the D and A boards. On the D board, the STB5V is applied to a 3.3V regulator IC9011. During standby operation, this regulator is kept off to disable the panel drive circuits. The STB5V is also applied to a 3.3V regulator IC5604 on the A board to provide the supply voltage STB3.3V to the Main CPU IC1100. The STB3.3V is also applied the Remote Control receiver and the power LED on the K board. Furthermore, the STB3.3V is provided to the SD card slot Not shown in the diagramSTB5V/STB3.3V Distribution STB5V STB5V The STB5V source is connected to the voltage input pin 4 of the RESET/STB3.3V regulator IC9011. The output of this IC is controlled by the ON/OFF pin Pin 6. The DC level of this pin is determined by the “STB3.3V ON/OFF” circuitMain CPU VCC Supply A Board Main CPU VCC Supply A Board This command splits in 2 TUNERSUBON and TVSUBONTVSUBON/TUNERSUBON TVSUBON/TUNERSUBON P Board TVSUBON FSTBONTVSUBON FSTBON The F-STB-ON voltage 3.2V from pin 6 of connector P7 is applied to pin 23 of the Power CPU IC501 on the P board. IC501 sends out commands to first turn on the primary circuit of the power supply, and then the circuit that allows the FSTB15V to developTVSUBON Relay Drive Circuit 300ms later, pin 12 goes “low” allowing for only the main relay RL402 to remain on. RL401 is triggered whenever RL402 or RL403 are triggered TVSUBON Relay Drive CircuitPFC Circuit ACFB Active Clamp Full Bridge Switching Circuit 5. The FSTB15V is applied to pins 7, 8, and 9 of connector P6 ACFB Active Clamp Full Bridge Switching CircuitMAIN/SUB Voltages MAIN/SUB Voltages The F+15V from the power supply is applied to pins 6, 7, and 8 of connector A6 on the A board. The 15V is applied to the voltage input pin pin 9 of the “SUB+5V/SUB+9V” dual regulator IC3500. The 15V is also used to keep pin 1 and pin 15 highF+15V, DTV9V, SUB5V SOS Detect Circuit The F+15V, DTV9V, and SUB5V are monitored for over-voltage and over-current conditions by the SOS circuit on the A board F+15V, DTV9V, SUB5V SOS Detect CircuitPower On Operation The power command from the power switch on the S board or the remote control receiver on the K board is provided to the CPU in the A board. The CPU on the A board outputs the “PANELSTBON” command and the “FSTBON” command. The “PANELSTBON” is provided to the D board to turn on the STB3.3V regulator. The output voltage is applied to the CPU in the D board. The “FSTBON” command is provided to the power supply to develop the FSTB+15V Power On OperationPower-On When the unit is turned on using the power button on the front of the TV, the momentary connection of the power switch to ground supplies a low to the base of Q5604 DG board to turn it on. Q5604 outputs a low to the key input line pin 18 of the CPU IC1100 on the A board Power-OnPower On Power On The STBY5V from the power supply board is applied to pin 4 of the regulator, IC9011. During Standby operation, the regulator does not operate due pin 6 being low Power OnPower On Summary P15V/P5V Circuit P15V/P5V Circuit The P15V is generated when the power is turned on. The high 3.2V “Panel Main On” command from the D board is applied to pin 24 of the Power MCU IC501 on the Power Supply board. When IC501 receives this command on pin 24 3.2V, pin 10 goes highVsus/Vda Circuit Vsus/Vda Circuit Unplug the TV Troubleshooting No Power/Dead Unit PartReconnect Troubleshooting No Power/Dead Unit Partconnector A52 If cable between connectors GS52 and10th Generation Plasma Television Shutdown CircuitsPage SOS Circuit Overview Protection circuits are incorporated in the unit to prevent the failure of a single circuit or component from creating catastrophic damage SOS Circuit OverviewSOS Circuit Overview 6 Blinks SOS 6 blinks of the power LED may also be obtained from pin 3 of IC9003, theSOS Circuit Overview 10 Blinks SOS IC5600 is a 3.3V regulator located on the A board. Its output is monitored by IC1100. If the 3.3V is not present at pin 67, the MPU shuts down the unit. The power LED blinks 10 timesDRVRST SOS Test Point TP9200 is the ideal location to check for DRV RST DRVRST SOSLocation of Q9302 Close-up View of Q9302 5 Blinks SOS 5 Blinks SOS The 5V SOS may be caused by a defective shift register located on a ribbon cable that connects the C boards to the panel. A shorted shift register typically shorts out both the Vda and 5V inputs. To determine whether a shift register is shorted or not, disconnect the connector SS23 and measure the resistance between pin 12 of the connector C23 and ground. The normal resistance is approximately 110000 ohms. If the panel is shorted, the resistance to ground is very lowSOS Drive-reset D and C Boards Connection 12 Blinks SOS 12 Blinks SOS 1. Sound processing and adjustments are performed by IC2106. The two channel PWM audio output of the IC is applied to the audio power amplifier IC2301. The PWM signals of the power amplifiers are output to the right and left channel speakers for sound reproduction10th Generation Plasma Television Signal ProcessingPage Signal Circuit Overview The K is the Remote Receiver and Power LED board. Commands that originate from the remote control or keypad of the GS board are received and processed by the system control circuit located on the A board Signal Circuit OverviewVideo Process Block Diagram The main function of the A board is to select and process one of the incoming video signals. Video inputs 1 and 2, Component Video Inputs 1 and 2 and the composite video output of the tuner are all are connected to IC3001 for selection. The video output signal of the switch can be in any of the three formats Video, Y/C, or Y, Pb, Pr. The selected output enters IC4510, the HDMI IF Receiver/Decoder IC, for A/D conversion Video Process Block DiagramD Board Block Diagram Component D Board Block DiagramComponent Functioninside Panel Drive TH-42PX75UBack side view DrivePanel Drive TH-42PX75U Discharge ControlData Drive Audio Process Block Diagram IC3101 of the A board handles the audio selection of most inputs. Analog Audio signals from composite, component, and DVI inputs are connected to IC3101 for selection. The analog audio of the tuner is also provided to IC3101 for selection. The output of IC3101 enters IC2106 and undergoes analog to digital conversion. The serial data output is provided to the switch. The HDMI receiver section of IC4510 converts the incoming HDMI audio into serial data. The Audio interface circuit selects between the two HDMI audio and outputs the SD serial Data to the switch located inside IC2106 Audio Process Block DiagramPage 10th Generation Plasma Television AdjustmentsPage Self-Check Function remote control for more than 3 seconds1. Checks the communication IIC bus lines 2. Provides a SOS History Note All customer programmed parameters will be erased How to Reset the UnitSelf-Check Menu Check point TV or the Remote Control Serviceman ModeKey command Serviceman Mode Menu and NavigationAdjustment Sub Menu TV or the Remote Control Internal Test PatternsDriver Set-up Item / Preparation Driver Setup AdjustmentInitialization Pulse Adjustment 1. Input a 100% White signal to the unitAspect Full Quick adjustment after P.C.B. exchange 2. Quick adjustment after P.C.B. or Panel exchange1. Caution