Circuit Descriptions
EN 46 Q549.2E LA7.
2009-May-08
Figure 7-7 PNX8543 functional diagram7.5.1 Video SubsystemRefer to Figure7-8 for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.
18440_202_090226.eps
090226
TS out/in for
TS in from
CVBS, Y/C,
LVDS for
analog CVBS
analog audio
I2S
Dual SPDIF
Low-IF
SSIF, LR
Dual HDMI
SPDIF
CI/CA
MPEG
PRIMARY
LVDS
VIDEO
SECONDARY
MEMORY
VIDEO 3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
300 MHz
300 MHz
I2C

PWM

GPIO IR ADC UART I2C GPIO Flash
SYSTEM
USB 2.0 CA

PNX8543x

DV INPUT
DV-ITU-656
AV-PIP
SPI
MPEG/H.264
I2S
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
channel decoder
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
CPU
MIPS32 4KEc
01 x22 x
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
channel)
(single or dual
flat panel display
DRAWING
ENGINE
DMA BLOCK
PCI 2.2