Philips Q549.2E }

IC Data Sheets

EN 58 Q549.2E LA8.

2009-May-08

8.6 Diagram SSB: Audio B10A, TPA3123D (IC 7D10)

Figure 8-6 Internal block diagram and pin configuration

Block Diagram

Pin Configuration

18440_302_090303.eps

090303

1F

SD

PVCCL

PVCCR

VCLAMP

GAIN1

BYPASS

1F

1F

0.22 F

AGND

}

Control

Shutdown

Control

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0.22 F

22 H

22 H

0.68 F

470 F

0.68 F

1F

470 F

GAIN0

AVCC

MUTE

ROUT

LOUT

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

PVCCL

SD

PVCCL

MUTE

LIN

RIN

BYPASS

AGND

AGND

PVCCR

VCLAMP

PVCCR

PGNDL

PGNDL

LOUT

BSL

AVCC

AVCC

GAIN0

GAIN1

BSR

ROUT

PGNDR

PGNDR

TERMINAL

I/O/P DESCRIPTION

24-PIN

NAME (PWP)

Shutdownsignal for IC (low = disabled, high = operational). TTL logic levels with compliance to

SD 2I

AVCC

RIN 6 I Audioinput for right channel

LIN 5 I Audioinput for left channel

GAIN0 18 I Gainselectleast-significant bit. TTL logic levels with compliance to AVCC

GAIN1 17 I Gainselectmost-significant bit. TTL logic levels with compliance to AVCC

Mutesignal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =

MUTE 4 I outputsenabled). TTL logic levels with compliance to AVCC

BSL 21 I/O BootstrapI/O for left channel

PVCCL 1,3 P Powersupply for left-channel H-bridge, not internally connected to PVCCR or AVCC

LOUT 22 O Class-D1/2-H-bridge positive output for left channel

PGNDL 23,24 P Powerground for left-channel H-bridge

VCLAMP 11 P Internallygenerated voltage supply for bootstrap capacitors

BSR 16 I/O BootstrapI/O for right channel

ROUT 15 O Class-D1/2-H-bridge negative output for right channel

PGNDR 13,14 P Powerground for right-channel H-bridge.

PVCCR 10,12 P Powersupply for right-channel H-bridge, not connected to PVCCL or AVCC

AGND 9 P Analogground for digital/analog cells in core

AGND 8 P Analogground for analog cells in core

Referencefor preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via

BYPASS 7 O externalcapacitorsizing.

AVCC 19,20 P High-voltageanalog power supply. Not internally connected to PVCCR or PVCCL

Connectto ground. Thermal pad should be soldered down on all applications to properly

Thermalpad Die pad P secure device to printed wiring board.

Contents

Main Colour Television Chassis Q549.2E LA Contents Page Contents Page Revision List EN 2 Q549.2E LA1. 1. Revision List 2. Technical Specifications and, Connections 2.1 Technical Specifications 2.2 Directions for Use Page Technical Specifications and, Connections EN 4 Q549.2E LA2. Technical Specifications and, Connections EN 5Q549.2E LA 2. 2.4 Chassis Overview Precautions, Notes, and Abbreviation List EN 6 Q549.2E LA3. 3. Precautions, Notes, and Abbreviation List 3.1 Safety Instructions 3.2 Warnings 3.3 Notes Precautions, Notes, and Abbreviation List EN 7Q549.2E LA 3. S 3.4 Abbreviation List Precautions, Notes, and Abbreviation List EN 8 Q549.2E LA3. Precautions, Notes, and Abbreviation List EN 9Q549.2E LA 3. 4. Mechanical Instructions Page Mechanical Instructions EN 12 Q549.2E LA4. 4.2 Service Positions 4.3 Assy/Panel Removal Mechanical Instructions EN 13Q549.2E LA 4. Mechanical Instructions EN 14 Q549.2E LA4. 4.4 Set Re-assembly 5. Service Modes, Error Codes, and Fault Finding 5.1 Test Points 5.2 Service Modes Page Page 5.3 Stepwise Start-up Protection Active Hibernate Semi St by St by Off Stand by or Protection I_17660_125a.eps 140308 2009-May-08 Semi-Standby Figure 5-5 Off to Semi Stand-by flowchart (part 2) Enter protection I_17660_125b.eps 140308 Figure 5-6 Semi Stand-by to Active flowchart Active Semi Standby Constraints taken into account: Figure 5-7 Semi Stand-by to Active flowchart LCD with preheat Active Semi Standby Constraints taken into account: Active Semi Standby Figure 5-8 Semi Stand-by to Active flowchart (LED backlight) Constraints taken into account: Figure 5-9 Active to Semi Stand-by flowchart (LCD non DFI) Active Figure 5-10 Semi Stand-by to Stand-by flowchart Stand by Semi Stand by Figure 5-11 To Protection State flowchart Protection MP SP 5.4 Service Tools 5.5 Error Codes Page Page 5.6 The Blinking LED Procedure 5.7 Protections 5.8 Fault Finding and Repair Tips Page Figure 5-14 SSB replacement flowchart Set is startingup & display is OK. Instruction note: SSB replacementQ528.x, Q522.x, Q529.x, Q54x.x Set is starting up in Factory mode. Set is startingup but no display. Setis going into protection after replacing the SSB (blinkingLED, error 2). Q54x.x 5.9 Software Upgrading Page 6. Alignments 6.1 General Alignment Conditions 6.2 Hardware Alignments 6.3 Software Alignments 6.4 Option Settings 6.5 Reset of Repaired SSB 6.6 Service SSB delivered without main software loaded 6.7 Total Overview SAM modes Page Page Page 7. Circuit Descriptions 7.1 Introduction 0 USB2 Matrix Class-D Figure 7-2 SSB layout cells (top view) Wifi 1P00 DC/DC 7.2 Power Architecture PSU Stby P Ambilight Display 4 HDMI inputs PWM PNX8543x Page PNX8543x Circuit Descriptions EN 49Q549.2E LA 7. PNX8543x 7.6 Common Interface CI+ CAM 7.7 Net TV (SC) Matrix PNX8543 ARM N Page 8. IC Data Sheets Pin Configuration Figure 8-1 Internal block diagram and pin configuration electrical diagrams (with the exception of memory and logic ICs). 8.1 Diagram SSB: DC/DC B01A, TPS53124PW (IC 7U03) EN 54 Q549.2E LA8. 8.2 Diagram SSB: Front End B02B, DRX3926K (IC 7T50) DRXK Figure 8-2 Pin configuration Block Diagram Block Diagram Pin Configuration PNX8543xEH EN 56 Q549.2E LA8. Pin Configuration 8.4 Diagram SSB: Ethernet B05A, PNX5120 (IC7C00) Figure 8-4 Internal block diagram and pin configuration Block Diagram PNX51xx DP83816 Figure 8-5 Internal block diagram and pin configuration a t a d r w x R r d d A x T DP83816 } 8.6 Diagram SSB: Audio B10A, TPA3123D (IC 7D10) Block Diagram Pin Configuration 9. Block Diagrams Wiring Diagram 32" (Elite Core) 8150 AL 5/5 B MAIN POWER SUPPLY IPB DPS-298CPA B (1050) IR LED PANEL 1M01 Wiring Diagram 56" (Elite Core) 1M85 8109 L (1046) PNX8543 H264 USB 2.0 FPGA WOW LOCAL CONTRAST DDR PNX8543 H264 USB 2.0 NAND FLASH 1G CLASS D POWER AMPLIFIER AUDIO Block Diagram Control & Clock Signals CONTROL + CLOCK SIGNALS (1G) PNX5120 RES Block Diagram I2C IC 3E08 R2-IN T2-OUT Supply Lines Overview SUPPLY LINES OVERVIEW 3 7U0P VSW 10. Circuit Diagrams and PWB Layouts Interface Ambilight: Interface + Single DC-DC 13 08-06-06******** CT ROYAL PHILIPS ELECTRONICS N.V. 2008 Interface Ambilight: Dual DC-DC 9202 C4 F200 B2 F201 C7 F203 B5 F207 C4 CHECK 130 08-10-23 Interface Ambilight: Microcontrollerblock 3 MICRO- CTRL A 1M59 3313 2212 2105 2224 6 LED Low-Pow: Microcontroller Block Liteon B CTRL CHECK DATE A2 6 LED Low-Pow: Microcontroller Block Liteon INPUT BUFFER NAME CHECK DATE A2 6 LED Low-Pow: LED Liteon 197 P D 3 1M83 1M84 3104 313 6313.3 18310_551_090309 090309 21282129 1M1A1M2A 8 LED Low-Pow: Microcontroller Block Liteon C 2008-06-10 3 2008-08-08 8 LED Low-Pow: Microcontroller Block Liteon I SUPERS. 23 2008-06-02 8 LED Low-Pow: LED Liteon E 11 2 8 8 LED Low-Pow: LED Drive Liteon 3571 G7 2008-05-23 2008-05-230 2008-08-08 1M83 1M841M85 1X03 7215 1M1A1M2A1M3A 10 LED Low-Pow: Microcontroller Block Liteon C 2008-06-10 3 2008-08-08 10 LED Low-Pow: Microcontroller Block Liteon 17 SUPERS. 23 2008-06-02 10 LED Low-Pow: LED Liteon E 11 2 8 10 LED Low-Pow: LED Drive Liteon 12 14 10 1319 16 1M83 1M841M85 1X03 7215 1M1A1M2A1M3A 144 9 M DC/DC 9 3 H 1 2 7 3 RESERVED G 2101 13 M 9101112131415 4 10 14 N 11 SSB: Front End FRONT-END 1 2008-06-03 ROYAL PHILIPS ELECTRONICS N.V. 2008 SSB: Demodulator 12 1 18 H SSB: PNX8543 - Stand-by Controller F (8Kx8) 8204 000 8927 SUPERS. A B 4 C D 3 SSB: PNX8543 - Control H Maelegheer Ingrid SUPERS. NAME SSB: PNX8543 - Control 2 SUPERS. 616 2007-11-29 SSB: PNX8543 - SDRAM 8 6 7 19 SSB: PNX8543 - Digital Video In 561234 816 2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005 23 4 8910 12 18 SSB: PNX8543 - Analogue AV O P 17 2 M I 2008-11-21 SUPERS. 1216 M IHRJ D4 2 IHSZ D6 9H11 C4 2101 D AMPLIFIER 5 133 12 SSB: PNX8543 - Video Streams 2H08 D3 2H09 F3 3H73 F2 3HB1 C2 3HB2 C2 32008-10-10 A2 SUPERS. SSB: PNX8543 - Digital Video Out/LVDS 6 9 NC LVDS SSB: PNX8543 - Power VSS SETNAMECHN 1616 2007-11-29 SSB: PNX5100 - SDRAM 3C27-4 I8 130 91 SUPERS. SSB: PNX5100 - Video-In 3C33 E2 VDI LVDS_RX Maelegheer Ingrid SSB: PNX5100 - Power 567 2008-11-21 A3 SUPERS. B C D E 9 8 1 2 SSB: PNX5100 - LVDS 14 20 9 11 SSB: PNX5100 - Control 67 (2Kx8) EEPROM CONTROL SSB: PNX5100 - PCI XIO 130 SUPERS. NAME SSB: PNX5100 - Display-Interfacing L 11 2043 17 C D 34 PNX5100 : DEBUG 12 A B B C D SSB: FPGA Backlight-LVDS I2C-Mux BANK2 FOR FACTORY USE ONLY N 18 FOR FACTORY 1 USE ONLY C 4 SSB: Temperature & Fan control 7 C J 3 SSB: FPGA WOW - LVDS In/Out 3FE3 F5 2008-11-21 A3 SUPERS. SSB: FPGA WOW - Power & Control 15 FLASH 16M 12 SSB: FPGA WOW - DDR 4 2 SUPERS. 68 SSB: FPGA WOW - I/O Banks 9FND C9 FF18 A1 FF19 B1 GND VCC BANK4 SSB: CI: PCMCIA Connector 2 SUPERS. 18 2007-10-18 C 1 A 3 5 SSB: USB Connector 31 83130 SUPERS. NAME SSB: HDMI 11 12 13 48 2007-10-18 ROYAL PHILIPS ELECTRONICS N.V. 2005 SSB: HDMI Switch 67 SUPERS. 58 2007-10-18 SSB: PNX8543: Flash 3P39-1 C3 Maelegheer Ingrid SUPERS. NAME SSB: Ethernet ETHERNET CONNECTOR 10/100 Mb/s SUPERS. NAME SSB: Buffering IN32 E4 IN34 B2 IN35 B2 IP31 D8 IP32 D8 SUPERS. NAME CHECK DATE SSB: Analogue Externals A I 8 413 P SSB: Analogue Externals B 3 EEPROM 4 10 11 12 13 14 SSB: Analogue Externals C CVBS RIGHT TO SIDE I/O SVHS IN SSB: Analogue Externals D I 12 5 SERVICE SSB: Mini PCI Connector 1A01-A A1 SUPERS. NAME CHECK DATE SSB: DDR Supply 678 8204 000 8935 TV543 R2 LDIPNX DDR SUPPLY SSB: Audio F 1 SUPERS. NAME SSB: SRP List Explanation 1 . 1 . Introduction Example 1.2. No n - SRP Schematics 1.3. SRP Schematics SSB: SRP List Part 1 3104 313 6343.2 18310_700_090309.eps 090309 Netname Schematic SSB: SRP List Part 2 3104 313 6343.2 18310_701_090309.eps 090309 Netname Schematic Layout Small Signal Board (Top Side) 1735 1M59 7U50 7U41 7U10 1F03 IP03 IN32 9T62 9T22 45678 12345678 123 A B C D LIGHT GUIDE 1P09 31043136344.1 18310_559_090420.eps 090508 C A 123 B C 123