Philips Semiconductors Product specification
SA70161.3GHz low voltage fractional-N synthesizer1999 Nov 04 3
SR01506
CLOCK
DATA
STROBE
RFin+
RFin–
REFin+
REFin–
TEST
LOAD SIGNALS
ADDRESS DECODER
2–BIT SHIFT
REGISTER
22–BIT SHIFT
REGISTER
CONTROL
LATCH
LATCH
MAIN DIVIDER
REFERENCE
DIVIDER
LATCH
AMP
11
12
6
5
15
14
13
2
PHASE
DETECTOR
COMP
PUMP
BIAS
PUMP
CURRENT
SETTING
GND
4
7
3
GNDCP
VDD
RSET
VDDCP
PHP
LOCK
10
9
8
1
PON
16
Figure 2. Block Diagram
PINNING
SYMBOL PIN DESCRIPTION
LOCK 1Lock detect output
TEST 2Test (should be either grounded or
connected to VDD)
VDD 3Digital supply
GND 4Digital ground
RFin+ 5RF input to main divider
RFin– 6RF input to main divider
GNDCP 7Charge pump ground
PHP 8Main normal chargepump
VDDCP 9Charge pump supply voltage
RSET 10 External resistor from this pin to ground
sets the chargepump current
REFin– 11 Reference input
REFin+ 12 Reference input
CLOCK 13 Programming bus clock input
DATA 14 Programming bus data input
STROBE 15 Programming bus enable input
PON 16 Power down control