Philips Semiconductors Product specification
SA70161.3GHz low voltage fractional-N synthesizer1999 Nov 04 6
SYMBOL UNITMAX.TYP.MIN.CONDITIONSPARAMETER
Phase noise (RSET = 7.5 kΩ, CP=00)
L
Synthesizer’s contribution to close-in phase noise
of 900 MHz RF signal at 1 kHz offset. GSM
fREF = 13MHz, TCXO,
fCOMP = 1MHz
indicative, not tested
– –90 – dBc/Hz
L
(f) Synthesizer’s contribution to close-in phase noise
of 800 MHz RF signal at 1 kHz offset. TDMA
fREF = 19.44MHz, TCXO,
fCOMP = 240kHz
indicative, not tested
– –85 – dBc/Hz
Interface logic input signal levels; pins 13, 14, 15, 16
VIH HIGH level input voltage 0.7*VDD – VDD+0.3 V
VIL LOW level input voltage –0.3 – 0.3*VDD V
ILEAK Input leakage current logic 1 or logic 0 –0.5 – +0.5 µA
Lock detect output signal (in push/pull mode); pin 1
VOL LOW level output voltage Isink=2mA – – 0.4 V
VOH HIGH level output voltage Isource=–2mA VDD–0.4 – – V
NOTES:
1. ISET =
VSET
RSET bias current for charge pumps.
2. The relative output current variation is defined as:
DIOUT
IOUT
+2.(I2–I1)
I(I2)I1)I ; with V1+0.7V, V2+VDDCP –0.8V (See Figure 3.)
I2
I1
I2
I1
V1V2
CURRENT
VPH
SR00602
IZOUT
Figure 3. Relative Output Current Variation