Philips Semiconductors Product specification
SA70161.3GHz low voltage fractional-N synthesizer
1999 Nov 04 5
CHARACTERISTICS
VDDCP = VDD = +3.0V, Tamb = +25°C; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply; pins 3, 9
VDD Digital supply voltage 2.7 5.5 V
VDDCP Analog supply voltage VDDCP = VDD 2.7 5.5 V
IDDTotal Synthesizer operational total supply current VDD = +3.0V 6.2 7.3 mA
IStandby Total supply current in power-down mode logic levels 0 or VDD 1 TBD µA
RFin main divider input; pins 5, 6
fVCO VCO input frequency 350 1300 MHz
VRFin(rms) AC-coupled input signal level Rin (external) = Rs = 50;
single-ended drive;
max. limit is indicative
@ 500 to 1300 MHz
–18 0 dBm
ZIRFin Input impedance (real part) fVCO = 1.2 GHz 625
CIRFin Typical pin input capacitance fVCO = 1.2 GHz 1.0 – pF
Nmain Main divider ratio 512 – 65535
fPCmax Maximum loop comparison frequency indicative, not tested 4 MHz
Reference divider input; pins 11, 12
fREFin Input frequency range from TCXO 5 40 MHz
VRFin AC-coupled input signal level single-ended drive;
max. limit is indicative 360 1300 mVPP
ZREFin Input impedance (real part) fREF = 20 MHz 10 – k
CREFin Typical pin input capacitance fREF = 20 MHz 1.0 – pF
RREF Reference division ratio 4 – 1023
Charge pump current setting resistor input; pin 10
RSET External resistor from pin to ground 6 7.5 15 k
VSET Regulated voltage at pin RSET=7.5 k 1.25 – V
Charge pump outputs (including fractional compensation pump); pin 8; RSET =7.5k, FC=80
ICP Charge pump current ratio to ISET1Current gain IPH/ISET –15 +15 %
IMATCH Sink-to-source current matching VPH=1/2 VDDCP. –10 +10 %
IZOUT Output current variation versus VPH2VPH in compliance range –10 +10 %
ILPH Charge pump off leakage current VPH=1/2 VCC –10 +10 nA
VPH Charge pump voltage compliance 0.7 – VDDCP–0.8 V