ThunderBird AvengerTM PCI Audio SAA7785
Accelerator
Philips Semiconductors Preliminary Specification
1999 Nov 12 56
PCI Configuration Space 2
The following table is a summary of all the PCI configuration space registers. The registers that are block-mates with
the PCI interface (offset 00h - 3Ch) will be detailed following SSA7785 ThunderBird Avenger™. The remainder of the
registers will be detailed with the blocks they control. This register space is for the 16650 UART.
TABLE 51 PCI Configuration Space 2 Register Map
TABLE 52 Vendor ID Register - VENDOR_ID (RO)
Bit Name R/W Function
7:0 MAXLAT RO Maximum latency specifies how often a device needs to gain access to the
PCI bus. The SSA7785 ThunderBird Avenger™, function 1, is a target only,
this register is read only and set to zero.
Byte 3 Byte 2 Byte 1 Byte 0 Offset
Device ID Vendor ID 00h
Status Command 04h
Class Code Revision ID 08h
BIST Header Type Master Latency Timer Cache Line Size 0Ch
UARTBASE 10-13h
Reserved 14-2B
Subsystem ID Subsystem Vendor ID 2Ch
Reserved 30-3Bh
Max_Lat Min_Gnt Interrupt Pin Interrupt Line 3Ch
Reserved Reserved Reserved UARTCFG0 40h
Reserved Reserved Reserved SFCR 44h
Reserved 48-FFh
PCI CFG 2 D15 D14 D13 D12 D11 D10 D9 D8
Offset 00h VENDOR_ID[15:8]
POR Value00010000
D7 D6 D5 D4 D3 D2 D1 D0
VENDOR_ID[7:0]
POR Value00000100
Bit Name R/W Function
15:0 VENDOR_ID RO The PCI Vendor ID for Philips Semiconductors (VLSI) is 1004h.