Rev. 1.00, 05/04, page 524 of 544
Condition
10 MHz
Item Symbol
Min. Max.
Unit Test
Conditions
Transmit data delay
time (synchronous)
tTXD — 100 ns
Receive data setup time
(synchronous)
tRXS 100 — ns
SCI
Receive data hold time
(synchronous)
tRXH 100 — ns
Figure 22.18
A/D
converter
Trigger input setup time tTRGS 50 — ns Figure 22.19
RESO output delay time tRESD — 200 ns WDT
RESO output pulse
width
tRESOW 132 — tcyc
Figure 22.20
Note: * Only peripheral modules that can be used in subclock operati on
Table 22.8 Keyboard Buffer Controller Timing
Conditions: VCC = 3.0 V to 3.6 V, VCCB = 3.0 V to 5.5 V, VSS = 0 V, φ = 4 MHz to maximum
operating frequency, Ta = –20 to +75°C
Ratings
Item Symbol Min. Typ. Max. Unit Test
Conditions Notes
KCLK, KD output fall time tKBF 20 +
0.1Cb
— 250 ns
KCLK, KD input data hold time tKBIH 150 — — ns
KCLK, KD input data setup time tKBIS 150 — — ns
KCLK, KD output delay time tKBOD — — 450 ns
KCLK, KD capacitive load Cb — — 400 pF
Figure 22.21