Renesas RZB-ZMD16C-ZDK Stop or Wait Mode Limitations, User Program’s Real-TimeCapability

Applications Engineering

Table 7-3: Interrupt Vector Addresses

Interrupt Cause	M16C/28 Vector Address	Kit Specification
Undefined	FFFDCh ~ FFFDFh	User available
Overflow	FFFE0h ~ FFFE3h	User available
BRK Instruction	FFFE4h ~ FFFE7h	User inhibited
Address Match	FFFE8h ~ FFFEBh	User inhibited
Single-step	FFFECh ~ FFFEFh	User inhibited
Watchdog Timer	FFFF0h ~ FFFF3h	User available (Note 1)
DBC	FFFF4h ~ FFFF7h	User inhibited
NMI	FFFF8h ~ FFFFBh	User available
RESET	FFFFCh ~ FFFFFh	Reset vector (Note 2)

NOTES:

(1)The Watchdog Timer vector is shared with the oscillation stop and voltage detection interrupts. The vector is available for oscillation stop and voltage detection interrupts, but you must avoid using the vector for watchdog timer interrupts.

(2)The kernel transparently relocates the Reset vector to FFFD8H.

7.6.Stop or Wait Mode Limitations

While running the kernel with an application that uses “STOP” or “WAIT” modes, care must be taken not to communicate with the MCU while “STOP” or “WAIT” is active (avoid RAM monitor or memory window refreshes, for example). Breakpoints (if used) should be set at points in the code where it is known that the BCLK is running at a frequency greater than 250 kHz.

7.7. User Program’s Real-Time Capability

Please be aware that while the kernel is in a “STOP” state, the hardware peripherals will continue to run. Therefore, interrupts may not be serviced properly. In addition, the watchdog timer will not be serviced and will likely time out if active.

While the kernel is in a “RUN” state, there is no overhead on the application code unless a RAM monitor window is open. This window requires periodic communication with the MCU. This communication suspends normal application operation while servicing the request (approximately 2000 BCLK cycles for each 16 bytes of data displayed in the window are used per window update). The user must determine whether this behavior is acceptable.

7.8. Performing Debug Using Symbols

Normally when a new project is created using HEW, debugging symbols are enabled. If you are unable to view the source properly during debug, add the debug option [-g] in HEW before compiling the programs. To enable the [-g] option, perform the following:

•Open the workspace and project in HEW.

•Select [Renesas M16C Standard Toolchain] from the Options pull-down menu.

•Click on the [Link] tab.

•Select [Output] under the [Category] list box.

•Click on the checkbox for [-g] ‘Outputs source debug information…’

•Click on the [OK] button

For more information, see the HEW user’s manual.

RZB-ZMD16C-ZDK User’s Manual Rev 1.2 19/ 33 August 2006