Seagate 810 manual O pins and associated ATA signals supported by the ST9816AG

22 Marathon 810 (ST9816AG) Product Manual, August 1995

Drive pin #	Signal name	Host pin # and signal description
1	Reset–	1	Host Reset
2	Ground	2	Ground
3	DD7	3	Host Data Bus Bit 7
4	DD8	4	Host Data Bus Bit 8
5	DD6	5	Host Data Bus Bit 6
6	DD9	6	Host Data Bus Bit 9
7	DD5	7	Host Data Bus Bit 5
8	DD10	8	Host Data Bus Bit 10
9	DD4	9	Host Data Bus Bit 4
10	DD11	10	Host Data Bus Bit 11
11	DD3	11	Host Data Bus Bit 3
12	DD12	12	Host Data Bus Bit 12
13	DD2	13	Host Data Bus Bit 2
14	DD13	14	Host Data Bus Bit 13
15	DD1	15	Host Data Bus Bit 1
16	DD14	16	Host Data Bus Bit 14
17	DD0	17	Host Data Bus Bit 0
18	DD15	18	Host Data Bus Bit 15
19	Ground	19	Ground
20	(removed)	20	(No Pin)
21	DMARQ	21	DMA Request
22	Ground	22	Ground
23	DIOW–	23	Host I/O Write
24	Ground	24	Ground
25	DIOR–	25	Host I/O Read
26	Ground	26	Ground
27	IORDY	27	I/O Channel Ready
28	CSEL	28	Cable Select pin
29	DMACK–	29	DMA Acknowledge
30	Ground	30	Ground
31	INTRQ	31	Host Interrupt Request
32	IOCS16–	32	Host 16 Bit I/O
33	DA1	33	Host Address Bus Bit 1
34	PDIAG–	34	Passed Diagnostics
35	DA0	35	Host Address Bus Bit 0
36	DA2	36	Host Address Bus Bit 2
37	CS1FX–	37	Host Chip Select 0
38	CS3FX–	38	Host Chip Select 1
39	DASP–	39	Drive Active / Slave Present
40	Ground	40	Ground
41	Power	41	+5 volts DC (logic)
42	Power	42	+5 volts DC (motor)
43	Ground	43	Ground for power pins
44	Reserved	44	Reserved

Pins 28, 34 and 39 are used for master-slave communication (details shown below).

Drive 1 (slave)

28

34

39

Drive 0 (master)		Host
28	CSEL	28
34	PDIAG–	34
39	DASP–	39

Figure 5. I/O pins and associated ATA signals supported by the ST9816AG