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| Integrated USB 2.0 Compatible |
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| Datasheet |
| Table 4.1 | ||
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NAME | SYMBOL | TYPE | FUNCTION |
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Port 4 Amber | AM4/ | I/O12 | Amber indicator LED for port 4. Will be active low when LED |
LED | LED_EN |
| support is enabled via EEPROM or SMBus. |
& |
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| If the hub is configured by the internal default configuration, |
LED Enable |
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| this pin will be sampled at RESET_N negation to determine | |
strapping option |
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| if LED support is enabled or disabled. Also, the active state | |
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| of the LED will be determined as follows: |
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| ‘0’ = LED support is disabled, LED is inactive |
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| ‘1’ = LED Support is enabled, LED is active low. |
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Port 3 Amber | AM3 | I/O12 | Amber indicator LED for port 3. Signal will be active low. |
LED |
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Port 2 Amber | AM2/ | I/O12 | Amber indicator LED for port 2. Will be active low when LED |
LED | MTT_EN |
| support is enabled via EEPROM or SMBus. |
& |
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| If the hub is configured by the internal default configuration, |
MTT Disable |
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| this pin will be sampled at RESET_N negation to determine | |
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| if MTT support is disabled (STT only). Also, the active state |
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| of the LED will be determined as follows: |
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| ‘0’ = MTT support is disabled, LED is active high |
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| ‘1’ = MTT support is enabled, LED is active low. |
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Port 1 Amber | AM1/ | I/O12 | Amber indicator LED for port 1, Will be active low when LED |
LED | GANG_EN |
| support is enabled via EEPROM or SMBus. |
& |
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| If the hub is configured by the internal default configuration, |
Gang Power |
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| this pin will be sampled at RESET_N negation to determine | |
Switching and |
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| if downstream port power switching and current sensing are | |
Current Sensing |
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| ganged, or individual | |
strapping option. |
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| the LED will be determined as follows: | |
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| ‘0’ = |
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| ‘1’ = Ganged sensing & switching, LED is active low. |
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Port Power | PRTPWR_POL | I/O12 | Port Power Polarity strapping determination for the active |
Polarity strapping. |
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| signal polarity of the [4:1]PRTPWR pins. |
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| While RESET_N is asserted, the logic state of this pin will |
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| (though the use of internal combinatorial logic) determine |
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| the active state of the [4:1]PRTPWR pins in order to ensure |
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| that downstream port power is not inadvertently enabled to |
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| inactive ports during a hardware reset. |
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| On the rising edge of RESET_N (see the applicable |
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| RESET_N timing table in Section 5.6.1), the logic value will |
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| be latched internally, and will retain the active signal polarity |
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| for the PRTPWR[4:1] pins. |
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| ‘1’ = PRTPWR[4:1]_P/N pins have an active ‘high’ polarity |
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| ‘0’ = PRTPWR[4:1]_P/N pins have an active ‘low’ polarity |
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Over Current | OCS[4:1]_N | IPU | Input from external current monitor indicating an over- |
Sense |
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| current condition. {Note: Contains internal |
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| supply} |
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USB Transceiver | RBIAS | A 12.0kΩ (+/− 1%) resistor is attached from ground to this | |
Bias |
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| pin to set the transceiver’s internal bias settings. |
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Revision 2.3 | 12 | SMSC USB2504/USB2504A |
| DATASHEET |
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