Integrated USB 2.0 Compatible 4-Port Hub

Datasheet

Table 4.1 4-Port Hub Pin Descriptions (continued)

NAME

SYMBOL

TYPE

FUNCTION

 

 

 

 

 

 

SERIAL PORT INTERFACE

 

 

 

 

Serial Data/SMB

SDA/SMBDATA

IOSD12

(Serial Data)/(SMB Data) signal.

Data

 

 

 

 

 

 

 

Serial Clock/SMB

SCL/SMBCLK

IOSD12

(Serial Clock)/(SMB Clock) signal.

Clock

 

 

 

 

 

 

 

Configuration

CFG_SEL0

IOSD12

This multifunction pin is read on the rising edge of

Programming

 

 

RESET_N negation and will determine the hub

Select

 

 

configuration method as described in Table 4.2.

 

 

 

 

Configuration

CFG_SEL1

I

This pin is read on the rising edge of RESET_N (see the

Programming

 

 

applicable RESET_N timing table in Section 5.6.1) and will

Select

 

 

determine the hub configuration method as described in

 

 

 

Table 4.2.

 

 

 

 

Configuration

CFG_SEL2

I

This pin is read on the rising edge of RESET_N negation

Programming

 

 

and will determine the hub configuration method as

Select

 

 

described in Table 4.2.

 

 

 

 

Table 4.2 SMBus or EEPROM Interface Behavior

CFG_SEL2

CFG_SEL1

CFG_SEL0

SMBus or EEPROM interface behavior.

 

 

 

 

X

0

0

Configured as an SMBus slave for external download of user-

 

 

 

defined descriptors. SMBus slave address is 0101100

 

 

 

 

X

0

1

Configured as an SMBus slave for external download of user-

 

 

 

defined descriptors. SMBus slave address is 0101101

 

 

 

 

0

1

0

Internal Default Configuration

 

 

 

 

1

1

0

Internal Default Configuration via strapping options.

 

 

 

 

X

1

1

2-wire (I2C) EEPROMS are supported,

 

 

 

 

Table 4.3 Miscellaneous Pins

NAME

SYMBOL

TYPE

FUNCTION

 

 

 

 

Crystal

XTAL1/

ICLKx

24MHz crystal or external clock input.

Input/External

CLKIN

 

This pin connects to either one terminal of the crystal or

Clock Input

 

 

to an external 24MHz clock when a crystal is not used.

 

 

 

 

Crystal Output

XTAL2

OCLKx

24MHz Crystal

 

 

 

This is the other terminal of the crystal, or left

 

 

 

unconnected when an external clock source is used to

 

 

 

drive XTAL1/CLKIN. It must not be used to drive any

 

 

 

external circuitry other than the crystal circuit.

 

 

 

 

Clock Input

CLKIN_EN

I

Clock In Enable:

Enable

 

 

Low = XTAL1 and XTAL2 pins configured for use with

 

 

 

external crystal

 

 

 

High = XTAL1 pin configured as CLKIN, and must be

 

 

 

driven by an external CMOS clock.

 

 

 

 

SMSC USB2504/USB2504A

13

Revision 2.3 (08-27-07)

 

DATASHEET