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ICX274AQ
Clock Voltage Conditions
Readout clock
voltage
Vertical transfer
clock voltage
Horizontal transfer
clock voltage
Reset gate clock
voltage
Substrate clock
voltage
Item
VVT
VVH1, VVH2
VVH3, VVH4
VVL1, VVL2,
VVL3, VVL4
VφV
VVH3 – VVH
VVH4 – VVH
VVHH
VVHL
VVLH
VVLL
VφH
VHL
VCR
VφRG
VRGLH – VRGLL
VRGL – VRGLm
VφSUB
Symbol
14.55
–0.05
–0.2
–8.0
6.8
–0.25
–0.25
4.75
–0.05
0.8
3.0
21.5
Min.
15.0
0
0
–7.5
7.5
5.0
0
2.5
3.3
22.5
Typ.
15.45
0.05
0.05
–7.0
8.05
0.1
0.1
0.5
0.5
0.5
0.5
5.25
0.05
5.25
0.4
0.5
23.5
Max. Unit
1
2
2
2
2
2
2
2
2
2
2
3
3
3
4
4
4
5
Wavefor m
diagram
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
Cross-point voltage
Low-level coupling
Low-level coupling
Remarks
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V