Appendix B: BIOS POST Checkpoint Codes

B-3 Uncompressed Initialization Codes

The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM.

Checkpoint

03h

05h

06h

07h

08h

0Ah

0Bh

0Ch

0Eh

0Fh

10h

11h

12h

13h

14h

19h

1Ah

2Bh

2Ch

2Dh

23h

24h

25h

27h

28h

Code Description

The NMI is disabled. Next, checking for a soft reset or a power on condition.

The BIOS stack has been built. Next, disabling cache memory.

Uncompressing the POST code next.

Next, initializing the CPU and the CPU data area.

The CMOS checksum calculation is done next.

The CMOS checksum calculation is done. Initializing the CMOS status register for date and time next.

The CMOS status register is initialized. Next, performing any required initialization before the keyboard BAT command is issued.

The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard controller.

The keyboard controller BAT command result has been verified. Next, performing any necessary initialization after the keyboard controller BAT command test.

The initialization after the keyboard controller BAT command test is done. The keyboard command byte is written next.

The keyboard controller command byte is written. Next, issuing the Pin 23 and 24 blocking and unblocking command.

Next, checking if <End or <Ins> keys were pressed during power on. Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End> key was pressed.

Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2.

The video display has been disabled. Port B has been initialized. Next, initializing the chipset.

The 8254 timer test will begin next.

Next, programming the flash ROM.

The memory refresh line is toggling. Checking the 15 second on/off time next.

Passing control to the video ROM to perform any required configuration before the video ROM test.

All necessary processing before passing control to the video ROM is done. Looking for the video ROM next and passing control to it.

The video ROM has returned control to BIOS POST. Performing any required processing after the video ROM had control

Reading the 8042 input port and disabling the MEGAKEY Green PC feature next. Making the BIOS code segment writable and performing any necessary configuration before initializing the interrupt vectors.

The configuration required before interrupt vector initialization has completed. Interrupt vector initialization is about to begin.

Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on.

Any initialization before setting video mode will be done next.

Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next.

B-3

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SUPER MICRO Computer H8SCM-F user manual Uncompressed Initialization Codes
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H8SCM, H8SCM-F specifications

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