Texas Instruments ADS8364, 65MEVM manual Bgnd

1 2 3 4

ADC Bypass

5 6

D

A0+

A0-

A1-

A1+

63

64

1

2

5

					BVdd		DVdd	AVdd
AVdd	DVdd	BVdd			C48	C47	C46	C40	C39	C38	C37
					0.1uF	0.1uF	0.1uF	0.1uF	0.1uF	0.1uF	0.1uF
3 8 13 59	22	24 50			BGND
AVdd AVdd AVdd AVdd	DVdd	BVdd BVdd								TP21
			CLK	28			CLK
											J7
					TP17
A0+			RESET#	51				RESET#	DC_TOUT
				52				ADD
A0-			ADD							W8
											R31
				53				BA2
A1-			A2								49.9
				54				BA1
A1+			A1
				55				BA0
			A0
A_REF
			HOLD_A#	56				HOLD_A#

BA0		4	1A
BA1	TP13	7	2A
BA2	TP15	9	3A
CS#	TP14	12	4A
	TP22	BVdd
	R19	1
	10K		S
		R22
		10K

BVdd

16 U3

1B1

1B2

2B1

2B2

3B1

3B2

4B1

4B2

/OE

C12

0.1uF

2

3

5

6

11

10

14

13

15

U6

4

EVM_A0

EVM_A1

EVM_A2

M_A0

M_A1

M_A2

BVdd 5

2 EVM_A3

DC_CSa

DC_AWE DC_ARE# A0

A1

A2

A3

DC_TOUT DC_INTa

EVM_A0 3

EVM_A1 6

EVM_A3 8

	J5
1	2
3	4
5	6

78

910

1112

1314

1516

1718

1920

Parallel Control

BVdd		C52
14
		0.1uF
	U7
	1OE			1
			2		A0
1Y	1A
				4
	2OE
			5		A1
2Y	2A
				10
	3OE
		9			A3
3Y	3A

D

B0+

B0-

B1-

B1+

6

7

11

12

	HOLD_B#		57			HOLD_B#
		58				HOLD_C#
B0+	HOLD_C#
B0-	FD		26	TP11		FD
		27				DC_INTa
B1-	EOC#
B1+	RD#		29	TP24	TP16	DC_ARE#

W6

8 SN74CBT3257PWR

BVdd

SN74X1G04 3

DC_CSa

EVM_A211

	4OE	13
		12	A2
4Y	4A
		SN74AHC125
7

C

C0+

C0-

C1-

C1+

TP8

10

16 17

18

19

15

62

61

B_REF

U4

WR#

30

DC_AWE

ADS8364/65

31

TP23

CS#

CS#

C0+

48

DC_D0

C0-

D0

47

DC_D1

D1

46

DC_D2

C1-

D2

45

DC_D3

C1+

D3

44

DC_D4

D4

43

DC_D5

C_REF

D5

42

DC_D6

D6

41

DC_D7

D7

40

DC_D8

D8

39

DC_D9

REFIN

D9

38

DC_D10

D10

37

DC_D11

REFOUT

D11

36

DC_D12

D12

35

DC_D13

D13

34

DC_D14

D14

33

DC_D15

AGND AGND AGND AGND

DGND

BGND BGND BGND

D15

NAP

23

BYTE

R23

BVdd

/NAP

4 9 14 60

21

25 32 49

20

10K

R15

W7

DC_D0	J6		R16
	1	2
DC_D1			10K
	3	4
DC_D2
	5	6
DC_D3
	7	8
DC_D4
	9	10
DC_D5
	11	12
DC_D6
	13	14
DC_D7
	15	16
DC_D8
	17	18
DC_D9
	19	20
DC_D10
	21	22
DC_D11
	23	24
DC_D12
	25	26
DC_D13
	27	28
DC_D14
	29	30
DC_D15
	31	32

ADC Data Bus

R17	R18
10K	10K
	M_A0
	M_A1	/NAP
	M_A2	ADD
		GP(CLKR)
		GP(FSX)
W4		GP(FSR)
		RESET#
A B C		GP(CLKR)

GP(FSX)

GP(FSR)

HOLD_A#

HOLD_B#

HOLD_C#

BVdd	BVdd
R34	R35
	10K
10K		J1
		1	2
		3	4
		5	6
		7	8
		9	10
		11	12
W10		13	14
	DC_TOUTa	15	16
		17	18
		19	20

ADC Control

McBSP 1 Setup

ADD = CLKX1 (GP OUT)

HOLD A# = CLKR1 (GP OUT)

HOLD B# = FSX1 (GP OUT)

HOLD C# = FSR1 (GP OUT)

RESET# = DX1 (GP OUT)

FD = DR1 (GP IN)

C

B

	0 ohm
		BGND
	W3	EXT. REF.
C8	C7	TP10
10uF	0.1uF

+3.3VD +1.8VD +5VA +VA

JP1

1	2
3	4
5	6
7	8
9	10

-VA -5VA +VD1 +5VD

B

AVdd

C45

0.1uF

TP12

R36

49.9

DVdd

TP9

DGND

+5VD

AGND

+VIN

TP2

+VA AVdd +5VA

	8
	U2A
	3
Vref	1
	2
	OPA2340

U2B

5

7

6

OPA2340

C15

10uF

C10

0.1uF

FB1		R26		FB3
		2K	C6
C49	D2			C3
	Green		10uF
0.1uF				0.1uF

	TP3
	FB5
C9
10uF	C41
	0.1uF

A

4

+5VD +3.3VD -VIN

	BVdd	W5		TP1
		R27		FB4
	TP20
		2K
	FB2		C5
		D1
				C2
C13		Green	10uF
				0.1uF
	C11
10uF		R32
	0.1uF
		0 ohm

BGND

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-VA				ti
				12500 TI Boulevard. Dallas, Texas 75243
			Title:
				ADS8364/65 Modular Evaluation Module
	Engineer:	Tom Hendrick
	Drawn By:	Tom Hendrick	SIZE: B		DATE: 14-Jul-2006	REV:	A
	FILE:					SHEET:	2 OF: 3
5				6

A