2 Circuit Description
2.1 Schematic Diagram
2.2 ADC Circuit Function
2.2.1 ADC Operational Mode
2.2.2 EVM Power Connections
2.2.3 ADC Analog Inputs
Circuit Description
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The schematic diagram for the EVM is in Section 6.3 .
The following sections describe the function of individual circuits. See the relevant data sheet for deviceoperating characteristics.
By default, the ADC is configured to operate in parallel-mode operation, because jumper (J3) asserts a3.3-V state to the ADC reset pin. Consequently, the SW1 reset pushbutton must be pressed only when thedevice is configured in serial operation mode. Because the ADC is in parallel operation mode, voltagesare used to set the ADC configuration modes. Users can use the EVM silkscreen to set the operationmodes.
Power is supplied to the EVM by banana jack sockets. Separate connections are provided for a 3.3-Vdigital buffer supply (J11) and 3.3-V analog supply (J13); however, by default these are shorted togetherusing R65, a 0- Ωresistor. Consequently, users can supply power to either J11 or J13 to power the ADC.The separate connections allow users to separate analog and digital supplies by removing R65. Whenusing the amplifier evaluation path, connect the positive rail to J20 and the negative rail to J16. Thevoltages depend on the coupling method and connection to the ADC. If the ADC VCM is not supplied tothe amplifier and the amplifier is connected to the ADC in a dc-coupled fashion, set J20 to 4 V and J16 to–1 V. In ac-coupled configurations where the ADC VCM biases the ADC inputs, connect J20 to 5 V andJ16 to GND. The ADC SPI interface and CDCP1803 also are powered through J20, which should be setto 5 V for operation of those circuits.
The EVM is configured to accept a single-ended input source and convert it to an ac-coupled differentialsignal using a transformer. The inputs to the ADC must be dc-biased, which is accomplished by using theADC VCM output. The input is provided by the SMA connector J8.
Using SMA input J10, users can evaluate the ADC using a THS4509 amplifier, which converts asingle-ended input into a differential signal while providing 10 dB of signal gain. Users should enable theamplifier path by connecting JP7 1–2 and by shorting positions 2–3 on both surface-mount jumpers JP5and JP6. At low input frequencies, the ADC represents a high-input impedance and R38, R46, and C76form a low-pass filter with a 3-db cutoff frequency of 70 MHz. Users can change these component valuesdepending on the bandwidth of the signal they are digitizing to band-limit the input noise into the ADC.Using an excessively high cutoff frequency degrades the SNR of the system. Before beginning evaluationof the amplifier path, a user must choose whether to dc-couple or ac-couple the amplifier path.
In a dc-coupled system, replace C75 and C77 with 0- Ωresistors and remove R37 and R45. Use the ADCVCM to set the CM input of the amplifier by ensuring that R21 is populated with a 0- Ωresistor. Becausethe ADC has a common-mode voltage of 1.5 V and because the THS4509 is not a rail-to-rail amplifier,adjust VCC to 4 V and –VCC to –1 V, which can be done by applying the respective voltages to J20 andJ16.
For an ac-coupled system, use the voltage divider R37 and R45 to set the common-mode input of theamplifier, which should be set to the midpoint of the amplifier supply. Alternatively, users can leave R37and R45 unpopulated and the amplifier sets its own common voltage to (VCC – VEE)/2. Capacitors C75and C77 provide ac-coupling of the system, and the ADC inputs then can be biased by the R41 and R42combination. Another ac-coupled approach, not supported on this EVM, is to use a transformer at theoutputs of the THS4509. In this case, the transformer provides for ac-coupling, and the inputs of the ADCcan be biased by feeding the ADC VCM to the transformer center tap on the secondary.
6 SLAU206B – September 2007 – Revised April 2008Submit Documentation Feedback