SLUU130A – September 2002 – Revised February 2003
Typical efficiency curves are shown in Figure 5 for an input of 3.3 V.
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| EFFICIENCY |
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| vs |
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| OUTPUT CURRENT |
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| 100 |
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| 95 |
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| 90 |
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– % | 85 |
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80 |
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Efficiency |
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75 |
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70 |
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| 65 |
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| 60 |
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| 55 |
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| 50 |
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| 0 | 1 | 2 | 3 | 4 | 5 | 6 |
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| IOUT – Output Current – A |
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Figure 5.
Figure 6 shows the switch node during typical operation at full load. Note that there is very minimal body diode conduction in the bottom MOSFET. This is a result of using the predictive delay control implementation. This technique is able to dynamically change the delays in the MOSFET drive circuit to account for variations in line, load, and between devices.
TYPICAL SWITCH NODE WAVEFORM
2 V/div
t – Time – 250 ns/div
Figure 6.
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