SD80 series
128MB~2GB SD80 Cards
•Bus Timing (High Speed Mode)
Parameter
Symbol
Min
Max.
Unit
Remark
Clock CLK (All values are referred to min (VIH) and max (VIL)
| Clock frequency Data Transfer Mode | fPP | 0 | 50 | MHz |
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| Clock low time | tWL | 7 |
| ns |
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| Clock high time | tWH | 7 |
| ns |
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| Clock rise time | tTLH |
| 3 | ns |
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| Clock fall time | tTHL |
| 3 | ns |
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| Inputs CMD, DAT (referenced to CLK) |
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| Input | tISU | 6 |
| ns |
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| Input hold time | tIH | 2 |
| ns |
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| Outputs CMD, DAT (referenced to CLK) |
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Transcend Information Inc. |
| 7 |
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