14 VT1536A Isolated Digital Input/Output SCP
Programming with the VT1415A/19A Algorithm Language
The following example shows the command sequence (platform/language
independent) to transfer the digital states from the lower 4 channe ls ( inputs)
to the upper 4 channels (outputs). In other words, the state you input to on e
of the lower 4 channels will drive the corresponding output channel. The
example assumes that the SCP is installed in SCP position 0
(covers channels 0 through 7), the first four channels are configured as
inputs, and the last four are configured as outputs (See “Setting
Configuration Switches” on page 4.).
*RST reset module to default states
ALG:DEF 'ALG1','O104=I100; O105=I101; O106=I102; O107=I103;'defines the algorithm
INIT start algorithm (using default trig sys setup)
When the algorithm is run, digital states input to channels 0 through 3 will
be output on channels 4 through 7.
*RST and *TST? (Important!)
The *RST/Power-up state and *TST? command reset the VT1415A/19A to
its default state. This will cause all outpu t-configured channel solid-state
relays to "open" (turn off), disable debounce, and restore channel polarity to
normal. Keep this in mind when applying the VT1536A SCP to your system
and design the "open" state as the safe state for your system.
Note *RST will report error 3105, "Invalid SCP switch setting" if one or more
configuration switches are set to invalid configurations.