Page 16
UTY4422-002 Page 16 of 72
Figure 1. UNITY4422 Block Diagram
VIDEO DEC
EXPANSION BUS CONNECTORS
27 MHz Clock Distributions:
27M1A --> EXPA (Audio)
27M1D1 --> D1 (Video)
27M2 --> XC5204
27M3 --> 80C51XA
27M4 --> CPU_2096, TMS2490
27M5 --> DSP_2096
27M6 --> CS4920_1, CS4920_2
VCLK --> CL9100
GCLK --> CL9100
27M7 --> XC5202
27M1M --> EXPM (MPEG2)
CHCLK (7.5 MHz) Distributions:
CHCLKA --> DVB Receiver Module
CHCLKB --> CL9110
CHCLKC --> XC5202
ECLK --> EXPM
20MHz --> DSP_320C203
CLOCK
27 Mhz 256K x 16
32K x 8 32K x 8
32K x 8
256K x 16
256K x 16
256K x 16
256K x 16 256K x 16
128K x 8
128K x 8
(32K x 8)
128K x 8
(32K x 8)
128K x 8
128K x 8
128K x 8
AUDIO
DEC 2
AUDIO
DEC 1
DEMUX
REG
REG
REG
20.000 MHZ
VCXO VIDEO
ENCODER
COMPOSITE
VIDEO
CPU
FLASH 1
FLASH 2
Control Control
Addr/Data
DSP
DSP CTL
Address
Data
MPEG2 A / V
POWER
SUPPLY
120 VAC
SRAM
MPEG2
TRANSPORT
TRANSPORT
AUDIO 2
CONTACT
CLOSURE
DECRYPTION
I
2
C BUS I
2
C BUS
I
2
C BUS
I
2
C BUS
ALARM
RELAY
R/X CONTROL
CS
R/X CONTROL
R/X CONTROL
R/X DATA IN
FRAM
SRAM
FLASH (DEBUG)
TX1
AUDIO
3 & 4
16
HS BUS
23
HBUS
I
2
C BUS
IRQ / CTL
L_Addr
CLK_EN
RESET
5 & 6
SECURE MC
2048 X 8
DB-9
PLL
FIFO
DUART
MPEG2
RATE
BUFFER
MPEG2 AUDIO
INT
POWER ON -
WATCHDOG
RESET
LNB
DVB RECEIVER
MODULE (OR
DECRYPTION
EXPANSION)
-12V
+5V
+24V
+5V
LNB
+3.3V
+3.3V
+12V
GND
+24V
+5V
DB-9
I/O PORT
AUDIO 2
I
2
C BUS
I
2
C BUS
A
C
D
A
LEFT
RIGHT
LEFT
RIGHT
DECRYPTION
SERIAL
PORT
DRAM
DRAM
TO FRONT PANEL
DISPLAY &
PUSHBUTTONS
I
2
C BUS
RJ-11