Features:
R
Features:
•MicroBlaze Microprocessor
♦50 MHz on the
♦Instruction cache and data cache options disabled
♦32
♦Single cycle execution
♦Direct access to the register file using Fast Simplex Link (FSL)
•Unified instruction and data BRAM into single memory for both instruction and data segments
♦Dual port 16 KB internal blockRAM memory structure
♦
•RS232 UART Controller
♦
•General purpose input/output ports (GPIO)
♦
♦
♦
♦
•JTAG_UART core with Xilinx Microprocessor Debugger (XMD) and GDB debugger to provide application/software debugging capabilities
♦XMD uses a JTAG_UART to communicate with xmdstub on the board
♦xmdstub is an executable software loaded into local system memory at startup
♦Supports run time control, such as Run, Single Step, Breakpoint, View Registers, and View Memory, as well as debug parameters
Note: Interrupts are not used in this design. For an example on how to use interrupts, see the Microblaze design using an OPB interrupt controller and an OPB microprocessor debug module (MDM) reference design available on the Embedded Design Kit web site at http://www.support.xilinx.com/ise/embedded/edk_examples.htm
For documentation on interrupts, see the MicroBlaze Processor Reference Guide in the EDK documentation.
MicroBlaze Microcontroller Ref Des User Guide | www.xilinx.com | 3 |
UG133 January 7, 2005