Peripheral Control Module

11.9.11SDLC Register Locations

Table 11-15shows the registers associated with the SDLC and the physical addresses used to access them.

Table 11-15. SDLC Control, Data, and Status Register Locations

 

Address

Name

Description

 

 

 

 

0h

8002 0060

SDCR0

SDLC control register 0

 

 

 

 

0h

8002 0064

SDCR1

SDLC control register 1

 

 

 

 

0h

8002 0068

SDCR2

SDLC control register 2

 

 

 

 

0h

8002 006C

SDCR3

SDLC control register 3

 

 

 

 

0h

8002 0070

SDCR4

SDLC control register 4

 

 

 

 

0h

8002 0074

Reserved

 

 

 

 

0h

8002 0078

SDDR

SDLC data register

 

 

 

 

0h

8002 007C

Reserved

 

 

 

 

0h

8002 0080

SDSR0

SDLC status register 0

 

 

 

 

0h

8002 0084

SDSR1

SDLC status register 1

 

 

 

 

0h

8002 0088 –

Reserved

0h

8002 FFFF

 

 

 

 

 

 

11.10Serial Port 2 – Infrared Communications Port (ICP)

The infrared communications port (ICP) operates at half-duplex and provides direct connection to commercially available Infrared Data Association (IrDA) compliant LED transceivers. The ICP supports both the original IrDA standard with speeds up to 115.2 Kbps as well as the newer

4-Mbps standard. Both standards use different bit encoding techniques and serial packet formats. Low-speed IrDA transmission uses the Hewlett-Packard Serial Infrared standard (HP-SIR) for bit encoding and a universal asynchronous receiver-transmitter (UART) as the serial engine; high-speed uses four-position pulse modulation (4PPM) and a specialized serial packet protocol developed expressly for IrDA transmission. To support these two standards, the ICP contains two separate blocks, each comprised of a bit encoder/decoder and serial-to-parallel data engine. The engine within the ICP that implements the special 4-Mbps protocol is called the high-speed serial to parallel (HSSP) receiver-transmitter. Only one of the two standards can be enabled at a time (the user cannot enable low-speed transmit and high-speed receive at the same time). To support a variety of IrDA transceivers, both the transmit and receive data pins can be individually configured to communicate either using normal or inverted data. Additionally, if IrDA transmission is not needed, the ICP’s UART can be enabled while disabling the HP-SIR bit encoder for use as a general-purpose serial port.

Note: Programming and operation of serial port 2’s UART is identical to serial port 3. See Section 11.11, “Serial Port 3 - UART” on page 11-128for a complete description of using the ICP for low-speed IrDA operation.

The external pins dedicated to the ICP are TXD2 and RXD2. If serial transmission is not required and the ICP is disabled, control of these pins is given to the peripheral pin control (PPC) unit for use as general-purpose input/output pins (noninterruptible). See Section 11.13, “Peripheral Pin Controller (PPC)” on page 11-184 .

SA-1100 Developer’s Manual

11-103

Page 253
Image 253
Intel SA-1100 manual Serial Port 2 Infrared Communications Port ICP, Sdlc Register Locations