Intel ETX CD manual Connector X2 Signal Description, ISA Bus Slot, Flat-Panel Interfaces

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4 ETX® connectors

4.4.2Connector X2 Signal Description

ISA Bus Slot

The implementation of this subsystem complies with the ETX® Specification. Implementation information is provided in the ETX® Design Guide. Refer to the documentation for additional information.

Restrictions:

Memory Transfer:

According to the used LPC 2 ISA solution only memory transfer in the Firmware HUB memory range and with Firmware HUB commands is possible. The Firmware HUB range is from FED4:0000 to FED4:0FFF

I/O Transfer:

Only two generic decoding ranges are available which can be selected in the BIOS setup with a maximum size of 256 Byte. This works of course only, when there are no other devices connected to that I/O ports in that range.

It can be that there is only one decoding range available, when there are the COM and/or parallel ports of an external SuperI/O controller used.

Signal level:

The signal level of the used Fintec controller is 3,3V, 5V tolerant. To achieve the 5V level, most of the signals are pulled up to 5V.

4.5Connector X3 (VGA, LCD, Video, COM1 and COM2, LPT/Floppy, Mouse, Keyboard)

Flat-Panel Interfaces

ETX®-CD modules can implement an LVDS flat-panel interface called JUMPtec Intelligent LVDS Interface (JILI). These modules do not implement a parallel digital flat-panel interface called JUMPtec Intelligent Digital Interface (JIDI).

LVDS Interface Pinout (JILI)

Pin

Signal

Pin

Signal

1

GND

2

GND

3

R

4

B

5

HSY

6

G

7

VSY

8

DDCK

9

DETECT#**

10

DDDA

11

LCDDO16

12

LCDDO18

13

LCDDO17

14

LCDDO19

15

GND

16

GND

17

LCDDO13

18

LCDDO15

19

LCDDO12

20

LCDDO14

21

GND

22

GND

23

LCDDO8

24

LCDDO11

 

 

 

 

Kontron User's Guide ETX CD

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Contents ETX CD Document Revision All not approved entries are markedThis page intentionally left blank Table of Contents Connector X4 IDE 1, IDE 2, Ethernet, Miscellaneous Kontron Users Guide ETX CD10.2.1 10.110.2 10.3User Information Technical Support Asia Europe North/South AmericaIntroduction IntroductionETX-CD 2x Serial ATA Sata 1x Parallel ATA IDEETX Documentation ETX BenefitsSpecifications Functional SpecificationsPCI 32 Intel ICH7 System MemorySerial Digital Video Output Sdvo Intel 945GM Enhanced Intelligent Drive Electronics Eide Intel ICH7Trustes Platform Module TPM Bios Phoenix, 1MB Flash-BIOS in Firmware Hub Flash MemoryAC ’97 Audio Intel 945GM Block diagram Mechanical Specifications Electrical SpecificationsETX-CD Core Duo Processor T2500 Power Consumption Windows XP SP2Cmos Battery Power Consumption Mtbf Environmental SpecificationsTemperature HumiditySpecifications General Signal Description ETX connectorsConnector Locations ETX connectorsConnector X1 PCI bus, USB, Audio Pin SignalPin Signal Description Type Termination Comment Connector X1 Signal LevelsPin 1-50 Power PCI USB Audio Type Termination Comment Pin 51-100 Power PCI USB AudioPin Signal Description PCI Bus Connector X1 Signal Description3V Power Supply for External Components AudioConnector X2 ISA Bus Connector X2 Signal Levels Pin 1-50 Power ISAPin 51-100 Power ISA Flat-Panel Interfaces Connector X2 Signal DescriptionISA Bus Slot Lvds Interface Pinout JiliParallel Port Mode Pinout Floppy Support Mode Pinout Parallel Port / Floppy InterfacesDCD1# SLCT# WGATE# DSR1# Msclk CTS1# Msdat TXD1 Kbclk Connector X3 Signal Levels Pin 1-50 Power VGA LcdtvPin 51-100 Power COM LPT Floppy KB/MS/IR Serial Ports 1 Connector X3 Signal DescriptionVGA Output PS/2 KeyboardFloppy IrDAParallel Port Connector X4 Subsystems Connector X4 IDE 1, IDE 2, Ethernet, MiscellaneousConnector X4 Signal Levels Pin 1-50Power IDE Ethernet Power control MiscPin Signal Description Type Power Management Connector X4 Signal DescriptionPower Control IDE PortsSdvo Output Feature Connector J11Sdvo Connector and Flat Foil Cable Miscellaneous CircuitsPin Pin on ETX-CD Description Bios RequirementsPinout Feature Connector J11 Reserved Special Features Special FeaturesWatchdog Timer ConfigurationThermal Management Heatspreader DimensionsDesign Considerations Design ConsiderationsPage Thermal Monitor and Catastrophic Thermal Protection I/O Apic vs 8259 PIC Interrupt modeImportant Technology Information Active Cooling Processor Performance ControlSummary Passive Cooling ETX-CD onboard Fan connectorSchematics of Fan control Critical Trip PointLocation and Pinout of Fan connector J6 Pinout Kontron Users Guide ETX CDVcc = Imax continuous = 68 a Imax pulsed = Bios SettingsElectrical characteristics Acpi Suspend Modes and Resume Events Processor Clock ThrottlingPage Interrupt Request IRQ Lines 8259 PIC modeSystem Resources Used For Available Available for PCI Comment Direct Memory Access DMA ChannelsApic mode Peripheral Component Interconnect PCI Devices Memory AreaI/O Address Map Inter-IC I2C BusJILI-I2C Bus Windows LimitationsISA Bus LimitationsSetup Guide Bios OperationDetermining the Bios Version Start Phoenix Bios Setup UtilityItem Specific Help Window Selecting an ItemDisplaying Submenus General Help WindowBios Setup Menus Info ScreenDisabled Main MenuIDE Channels Submenu AutoAdvanced Advanced Chipset Control Feature bit to always return CPU ControlDefault Chipset controlIntegrated Video DvmtISA Options PCI/PNP Configuration OtherPCI/PNP ISA UMB Region Exclusion PCI/PNP ISA IRQ Resource Exclusion Cache Memory Write ProtectDevice Configuration Lan Options Super I/O Controller Options IRQ4USB ports Console Redirection Keyboard Features Submenu 30/secHardware Monitor Watchdog Settings Display Control CRT + LFPMiscellaneous Submenu Security Menu Power Menu YesCPU Thermal Control Circuit PORBoot Menu Feature Option DescpriptionFeature Description Exit MenuUpdating or Restoring Bios Cannot flash when memory managers are presentPreventing Problems When Updating or Restoring Bios Appendix a Jida Standard Appendix a Jida StandardJida Information Buses 12.1.1 ISA, Standard PS/2 ConnectorsAppendix B PC Architecture Information 12.1.2 PCI/104Serial ATA Ports12.2.1 RS-232 Serial 12.2.3 USBKontron Users Guide ETX CD Rev. Date Author Changes Appendix C Document RevisionAppendix C Document Revision