Intel 945 SeriesUser's Manual
4.5.5 Advanced Chipset Features
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
SLP_S4# Assertion Width | [4 to 5 Sec.] | Item Help | |
System BIOS Cacheable | [Enabled] |
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Video BIOS Cacheable | [Disabled] | Menu Level ► | |
Memory Hole At | [Disabled] | ||
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► PCI Express Root Port Func | [Press Enter] |
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** VGA Setting ** |
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PEG/Onchip VGA Control | [Auto] |
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[ 8MB] |
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DVMT Mode | [DVMT] |
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DVMT/FIXED Memory Size | [ 128MB] |
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Boot Display | [Auto] |
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→← | :Move Enter:Select | F10:Save | ESC:Exit | F1:General Help | |
↑↓ | |||||
| F5: Previous Values | F6: | F7: Optimized Defaults |
・SLP_S4# Assertion Width
Available options:[4 to 5 Sec],[3 to 4 Sec],[2 to 3 Sec],[1 to 2 Sec]
・System BIOS Cacheable
Available options: [Enabled],[Disabled]
・Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this area is reserved, it cannot be cached. The user information of peripherals that need to use this area of system memory usually discusses their memory requirements.
・Video BIOS Cacheable
Select Enabled allows caching of the video BIOS, resulting in better system performance.
However, if any program writes to this memory area, a system error may result.
►PCI Express Root Port Func
Click <Enter> key to enter its submenu:
Phoenix - AwardBIOS CMOS Setup Utility
PCI Express Root Port Func
| PCI Express Port | 1(PCIE1) | [Auto(4X)] | ||
x PCI Express Port | 2 | Disabled | |||
x | PCI | Express | Port | 3 | Disabled |
x | PCI | Express | Port | 4(PCIE2) | Disabled |
| Mode | [v1.0a] |
Item Help
Menu Level ►►
→← | :Move Enter:Select | F10:Save | ESC:Exit | F1:General Help | |
↑↓ | |||||
| F5: Previous Values | F6: | F7: Optimized Defaults |
PCI Express Slot 1 ~ PCI Express Slot 4
This option enables or disables the PCI Express port function.
PCI-E Compliancy Mode
This item selects the mode for PCI Express
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