8xC251Tx Hardware Description
8xC251TB, 8xC251TQ Hardware Description
Addendum to the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ, User’s Manual
1.0 | INTRODUCTION TO THE 8xC251Tx |
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1.1 | Comparing the 8xC251Tx and 8xC251Sx | 1 |
2.0 | SIGNAL SUMMARY |
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3.0 | THE SECOND SERIAL I/O PORT |
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3.1 | Overview | 7 |
3.2 | Special Function Register Definitions | 9 |
3.2.1 | SCON1 | 9 |
3.2.2 | SBUF1 | 10 |
3.2.3 | SADDR1 | 10 |
3.2.4 | SADEN1 | 10 |
3.2.5 | BGCON | 10 |
3.2.6 | IE1 | 11 |
3.2.7 | IPH1 | 11 |
3.2.8 | IPL1 | 11 |
4.0 EXTENDED DATA FLOAT TIMING |
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4.1 | Summary of the Extended Data Float Timing Changes | 12 |
FIGURES |
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Figure 1 | 8xC251Tx Block Diagram | 1 |
TABLES |
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Table 1. | 8xC251Tx Signal Summary | 2 |
Table 2. | 8xC251Tx Signal Descriptions | 3 |
Table 3. | Special Function Register (SFR) Map | 6 |
Table 4. | Second Serial I/O Port Signals | 7 |
Table 5. | Second Serial I/O Port Special Function Registers | 8 |
Table 6. | SCON1 Special Function Register Definitions | 9 |
Table 7. | BGCON Special Function Register Definitions | 10 |
Table 8. | IE1 Special Function Register Definitions | 11 |
Table 9. | IPH1 Special Function Register Definitions | 11 |
Table 10. | IPL1 Special Function Register Definitions | 11 |
Table 11. | Interrupt Priority of Second Serial I/O Port | 11 |
Table 12. | UCONFIG1 bit definitions for the 8xC251Tx | 12 |
Table 13. | Summary of the EDF# and WSB#[1:0] Configuration Options | 13 |
December 2003 | v |