Memory
Figure 2-3 Node Controller
Memory
Express5800/A1160 systems use a
yKeep track of all copies of a cache line.
yDetermine which processor has permission to update an instance of a cache line.
yMark other copies of the cache line as "invalid" when an update occurs.
Memory Board. System memory is contained on the memory board. The memory board includes the fully buffered DIMMs and their associated power delivery components. A cell contains one or two memory boards. Each memory board supports
yTwo fully buffered DIMM channels from the node controller. Each channel operates as a single memory channel. These two channels are referred to as a channel pair.