Texas Instruments PCI1520 manual Miscellaneous Pin Interface, Multifunction Terminals

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SCPA033

6 Miscellaneous Pin Interface

6.1Multifunction Terminals

The multifunction terminals (MFUNC6:0) can be programmed to serve many different roles using the Multifunction Routing register at PCI configuration offset 8Ch. The discrete ISA interrupts (IRQ15:2), INTA#, INTB#, and IRQSER are explained in Section 7 – Interrupt Configurations. CLKRUN#, D3STAT#, and RI_OUT# are discussed in Section 9 – Power Management Considerations. ZVSTAT, ZVSEL1#, and ZVSEL0# are used for ZV control. For more information, please refer to the PCI1520 Data Manual.

LED_SKT, LEDA1, and LEDA2 can be used to indicate socket activity. When a PC Card is being accessed, these outputs will be driven high. LED_SKT will be driven high for access to either socket. LEDA1 and LEDA2 will only be driven high during access to their respective socket.

GPE#, GPIx, and GPOx can be used to signal general purpose events to the system.

CAUDPWM provides a PWM output for the CAUDIO terminals (as opposed to the binary output SPKROUT).

PCI LOCK# is an optional PCI signal as mentioned in Section 4 – PCI Bus Interface.

All unused multifunction terminals require a 43kpullup resistor.

6.2SPKROUT

SPKROUT is the output to the host system that can carry SPKR# or CAUDIO through the PCI1520 from the PC Card interface. If SPKROUT is enabled for both sockets, it is driven as an exclusive-OR of the two inputs. A 43k pulldown resistor is required to prevent oscillation when SPKROUT is disabled and therefore tristated.

6.3SUSPEND#

The assertion of SUSPEND# gates PRST#, GRST#, and PCLK from the PCI1520. More information can be found in Section 9 – Power Management Considerations. A 43kpullup resistor is required on SUSPEND#. SUSPEND# cannot be low during boot.

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PCI1520 Implementation Guide

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Contents PCI1520 Implementation Guide Document History PCI1520 Typical System Implementation CardBus Controller Block System SidePower Considerations Internal Voltage RegulatorClamping Rails Bypass CapacitorsPower Switch Implementation Power Switch ImplementationPCI Bus Interface PC Card Interface Miscellaneous Pin Interface Multifunction TerminalsInterrupt Configurations Parallel PCI Interrupts OnlyParallel IRQ and Parallel PCI Interrupts Serial IRQ and Parallel PCI InterruptsEeprom Configuration Software ConsiderationsBios Considerations MFUNC5=GPI4, MFUNC4=SCLPCI Configuration Registers TI Extension Power Management Considerations D3 Wake InformationGRST# Only Registers PME#/RIOUT# Behavior CLKRUN# ProtocolPin Compatibility with Other Devices Migration to the PCI1520 from the PCI1420 Hardware and Pin Assignment ChangesConfiguration Register Changes Other Functional Differences Migration to the PCI1420 from the PCI1225 Configuration Register Changes Reference Schematics U2AWAIT# Ready INPACK# Reset References Important Notice