Texas Instruments PCI1520 manual Power Considerations, Internal Voltage Regulator, Clamping Rails

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SCPA033

2 Power Considerations

2.1Internal Voltage Regulator

One of the major differences between the PCI1520 and previous Texas Instruments CardBus controllers is that the PCI1520 uses an internal voltage regulator to power the core logic at 2.5V. This allows for a more than 50% reduction in power consumption over previous controllers. The voltage regulator is enabled using the VR_EN# pin. If VR_EN# is high, the voltage regulator is disabled and VRPORT serves as a 2.5V external input to power the core. If VR_EN# is low, the voltage regulator is enabled and VRPORT serves as a 2.5V output. This 2.5V output cannot be used to power other devices and is only available externally in order to provide a 1µF bypass capacitor. VRPORT must have a 1µF bypass capacitor to ground in order for proper operation if the voltage regulator is enabled.

2.2Clamping Rails

The PCI1520 has 3 clamping rails: VCCP, VCCA, and VCCB. VCCP is the PCI interface I/O clamp rail and can be either 3.3V or 5V depending on the system implementation. The PCI1520 will only signal on the PCI bus at 3.3V but is 5V tolerant. VCCA and VCCB are connected to the PC Card power rails for Socket A and Socket B, respectively. These terminals serve as the clamping inputs for the PC Card interface to the PCI1520.

2.3Bypass Capacitors

Standard design rules for power supply bypass should be followed. A value of 0.1µF is recommended for each of the power pins VCC, VCCP, VCCA, and VCCB.

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PCI1520 Implementation Guide

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Contents PCI1520 Implementation Guide Document History PCI1520 Typical System Implementation CardBus Controller Block System SidePower Considerations Internal Voltage RegulatorClamping Rails Bypass CapacitorsPower Switch Implementation Power Switch ImplementationPCI Bus Interface PC Card Interface Miscellaneous Pin Interface Multifunction TerminalsInterrupt Configurations Parallel PCI Interrupts OnlyParallel IRQ and Parallel PCI Interrupts Serial IRQ and Parallel PCI InterruptsEeprom Configuration Software ConsiderationsBios Considerations MFUNC5=GPI4, MFUNC4=SCLPCI Configuration Registers TI Extension Power Management Considerations D3 Wake InformationGRST# Only Registers PME#/RIOUT# Behavior CLKRUN# ProtocolPin Compatibility with Other Devices Migration to the PCI1520 from the PCI1420 Hardware and Pin Assignment ChangesConfiguration Register Changes Other Functional Differences Migration to the PCI1420 from the PCI1225 Configuration Register Changes Reference Schematics U2AWAIT# Ready INPACK# Reset References Important Notice