Tyan Computer S1854 manual Appendix

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Appendix

Glossary

data the bus, phone line, or other electrical path, can carry. Greater bandwidth, then, also results in greater speed.

The BIOS (Basic Input/Output System) program resides in the ROM chip, and provides the basic instructions for controlling your computer’s hardware. Both the operating system and application software use BIOS routines to ensure compatibility.

A buffer is a portion of RAM which is used to temporarily store data, usually from an application, though it is also used when printing, and in most key- board drivers. The CPU can manipulate data in a buffer before copying it, all at once, to a disk drive. While this improves system performance--reading to or writing from a disk drive a single time is much faster than doing so repeatedly-- there is the possibility of losing your data should the system crash. Informa- tion stored in a buffer is temporarily stored, not permanently saved.

A bus is a data pathway. The term is used especially to refer to the connection between the processor and system memory, and between the processor and PCI or ISA local buses.

Bus mastering allows peripheral devices and IDEs to access the system memory without going through the CPU (similar to DMA channels).

A cache is a temporary storage area for data that will be needed often by an application. Using a cache lowers data access times, since the needed informa- tion is stored in the SRAM instead of in the slower DRAM. Note that the cache is also much smaller than your regular memory: a typical cache size is 512KB, while you may have as much as 1GB of regular memory.

Cache size refers to the physical size of the cache onboard. This should not be confused with the cacheable area, which is the total amount of memory which can be scanned by the system in search of data to put into the cache. A typical setup would be a cache size of 512KB, and a cacheable area of 512MB. In this case, up to 512MB of the main memory onboard is capable of being cached. However, only 512KB of this memory will be in the cache at any given moment. Any main memory above 512MB could never be cached.

Closed and open jumpers Jumpers and jumper pins are active when they are On or Closed, and inactive when they are Off or Open.

CMOS Complementary Metal-Oxide Semiconductors are chips that hold the basic start-up information for the BIOS.

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Contents Tyan S1854 Motherboard User’s Manual RevisionTable of Contents Compliance Information Overview ChapterIcons Hardware Specifications/Features Software Specifications Disk Drive & System I/OCreative Labs ES 1373 PCI Audio S1854A onlyReturning Merchandise for Service Technical SupportHelp resources For Resellers OnlyThis page left blank intentionally Installation How to install our products right...the first timeUnpacking What’s the first thing I should do?Installation Steps Do Notapplypowertothe Board Ifithas Been DamagedPin jumpers Off onMap of Motherboard Jumpers Map of S1854 Features CPU Setting Jumpers CPU Speed Settings Jumpers JP10, JP11, JP12, JP13Panel Connector Settings Jumper J16 Power LEDSoft Power Connector Creative Labs Audio Connectors optionalPower LED Connector Mounting the Motherboard in the ChassisInstalling Memory Install Pin Dimm Dimm Bank Total Installing the CPU and Cooling Fan Installing Socket 370 Type CPUsInstalling Slot1 Type CPUs Installing CPU Retention ModulesChapter Connecting IDE and Floppy Drives Removing CPUPin Installing Add-on Cards Connecting PS/2, USB, Serial & Parallel Devices Connecting Com and Printer Ports Connecting the Power Supply You are doneIntroduction to Setup Same as that displayed on your screenSetup Keys Case of Problems Main Setup Menu Setup VariationsStandard Cmos Setup Bios Features SetupChipset Features Setup Power Management SetupTime Standard Cmos SetupDate Hard Disks Halt On Drive aVideo Bios Features Setup MemoryBios Feature Setup Default Settings Chart Setting Option Bios Default Setup DefaultSettings Chart Quick Power On Self TestBoot Sequence Virus WarningBoot Up NumLock Status IDE HDD Block ModeTypematic Rate Setting Typematic Delay MsecVideo Bios Shadow Security OptionPCI/VGA Palette Snoop OS Select for Dram 64MBChipset Features Setup Advanced OptionsBank 0/1, 2/3, 4/5 Dram Timing Sdram Cycle LengthChipset Features Setup Default Settings Chart System Bios CacheableMemory Hole P2C/C2P ConcurrencyVideo RAM Cacheable AGP Aperture Size AGP Driving ControlAGP Driving Value AGP-4xModePower Management Setup IRQ4COM1PM Control by APM Power ManagementPower Saving Function PM Timers HDDPowerDownVideo Off Option Video Off MethodSuspend Mode RTC Alarm ResumeDozeMode PM EventsProcessed. Secondary interrupts are typically IRQnPnP/PCI Configuration PnP / PCI Configuration Default Settings ChartPNP OS Installed Reset Configuration DataPCI Delay Transaction PCI#2 Access #1 RetryAGP Master 1 WS Read Assign IRQ for VGAIntegrated Peripherals Default Settings Chart Integrated PeripheralsIDE Prefetch Mode On-Chip PCI IDE First/Second ChannelIDE Primary/Secondary Master/Slave PIO IDE Primary/Secondary Master/Slave UdmaPower on Function Uart Mode SelectOnboard Parallel Mode KBC Input ClockUser Password Flash Writer UtilityBios Flash Memory Writer System Resources Beep CodesTroubleshooting System Problems Displayed Error Messages Error Message Explanation Error Message Explanation Interrupt channel 2 failed PostAppendix Appendix Doze mode, only the CPU’s speed is slowed Appendix Glossary Appendix Glossary Installing SECC2 CPUs -Option LowerTabsRetention Figure D RemoveCPUInstalling SECC2 CPUs Option Figure H Document # D1373-200 Jumper Settings Quick Reference See pages 16-19 for details on Jumpers